Barbara J Bullock

Array ( [id] => 62729 [patent_doc_number] => 07763484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Method to form an optical grating and to form a distributed feedback laser diode with the optical grating' [patent_app_type] => utility [patent_app_number] => 12/155677 [patent_app_country] => US [patent_app_date] => 2008-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3298 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/763/07763484.pdf [firstpage_image] =>[orig_patent_app_number] => 12155677 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5364919 [patent_doc_number] => 20090302478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Semiconductor device and method of forming recessed conductive vias in saw streets' [patent_app_type] => utility [patent_app_number] => 12/133177 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6919 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302478.pdf [firstpage_image] =>[orig_patent_app_number] => 12133177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4715273 [patent_doc_number] => 20080237795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/131288 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 64 [patent_no_of_words] => 16698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237795.pdf [firstpage_image] =>[orig_patent_app_number] => 12131288 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 152391 [patent_doc_number] => 07683459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Bonding method for through-silicon-via based 3D wafer stacking' [patent_app_type] => utility [patent_app_number] => 12/131788 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3083 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/683/07683459.pdf [firstpage_image] =>[orig_patent_app_number] => 12131788 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5502325 [patent_doc_number] => 20090163013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'Method for Forming Gate of Non-Volatile Memory Device' [patent_app_type] => utility [patent_app_number] => 12/131558 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2133 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20090163013.pdf [firstpage_image] =>[orig_patent_app_number] => 12131558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4711180 [patent_doc_number] => 20080299706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'Wafer level package fabrication method' [patent_app_type] => utility [patent_app_number] => 12/155317 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5363 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20080299706.pdf [firstpage_image] =>[orig_patent_app_number] => 12155317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4789557 [patent_doc_number] => 20080290530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING PHOTO ALIGNING KEY AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/126187 [patent_app_country] => US [patent_app_date] => 2008-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1624 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290530.pdf [firstpage_image] =>[orig_patent_app_number] => 12126187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4789412 [patent_doc_number] => 20080290385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'METHOD FOR MANUFACTURING FERROELECTRIC CAPACITOR, AND FERROELECTRIC CAPACITOR' [patent_app_type] => utility [patent_app_number] => 12/125418 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7509 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290385.pdf [firstpage_image] =>[orig_patent_app_number] => 12125418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4792223 [patent_doc_number] => 20080293197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/124188 [patent_app_country] => US [patent_app_date] => 2008-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2339 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20080293197.pdf [firstpage_image] =>[orig_patent_app_number] => 12124188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5452753 [patent_doc_number] => 20090068790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'Electrical Interconnect Formed by Pulsed Dispense' [patent_app_type] => utility [patent_app_number] => 12/124097 [patent_app_country] => US [patent_app_date] => 2008-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8433 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20090068790.pdf [firstpage_image] =>[orig_patent_app_number] => 12124097 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4792253 [patent_doc_number] => 20080293227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'METHOD FOR FORMING GATE ELECTRODE OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/124058 [patent_app_country] => US [patent_app_date] => 2008-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3482 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20080293227.pdf [firstpage_image] =>[orig_patent_app_number] => 12124058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4960145 [patent_doc_number] => 20080274570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'Inkjet head, method for producing inkjet head, inkjet recorder and inkjet coater' [patent_app_type] => utility [patent_app_number] => 12/153347 [patent_app_country] => US [patent_app_date] => 2008-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10113 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20080274570.pdf [firstpage_image] =>[orig_patent_app_number] => 12153347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 63516 [patent_doc_number] => 07763879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Three-dimensional phase-change memory array' [patent_app_type] => utility [patent_app_number] => 12/152557 [patent_app_country] => US [patent_app_date] => 2008-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 39 [patent_no_of_words] => 10030 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/763/07763879.pdf [firstpage_image] =>[orig_patent_app_number] => 12152557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6408936 [patent_doc_number] => 20100140600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'THIN FILM TRANSISTORS INCORPORATING INTERFACIAL CONDUCTIVE CLUSTERS' [patent_app_type] => utility [patent_app_number] => 12/596164 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20100140600.pdf [firstpage_image] =>[orig_patent_app_number] => 12596164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5313662 [patent_doc_number] => 20090278260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'REDUNDANCY DESIGN WITH ELECTRO-MIGRATION IMMUNITY AND METHOD OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/115817 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3690 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20090278260.pdf [firstpage_image] =>[orig_patent_app_number] => 12115817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4949511 [patent_doc_number] => 20080305637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'METHOD FOR FORMING FINE PATTERN OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/115727 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2319 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0305/20080305637.pdf [firstpage_image] =>[orig_patent_app_number] => 12115727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4836934 [patent_doc_number] => 20080277798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/115628 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1723 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20080277798.pdf [firstpage_image] =>[orig_patent_app_number] => 12115628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5485417 [patent_doc_number] => 20090275182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'METHOD FOR FABRICATING A METAL HIGH DIELECTRIC CONSTANT TRANSISTOR WITH REVERSE-T GATE' [patent_app_type] => utility [patent_app_number] => 12/113557 [patent_app_country] => US [patent_app_date] => 2008-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2622 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20090275182.pdf [firstpage_image] =>[orig_patent_app_number] => 12113557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4708142 [patent_doc_number] => 20080296668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/112547 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8626 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20080296668.pdf [firstpage_image] =>[orig_patent_app_number] => 12112547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4887002 [patent_doc_number] => 20080261334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'Method of Processing Semiconductor Wafers' [patent_app_type] => utility [patent_app_number] => 12/107188 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3502 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20080261334.pdf [firstpage_image] =>[orig_patent_app_number] => 12107188 [rel_patent_id] =>[rel_patent_doc_number] =>)