Search

Barbara J Bullock

Examiner (ID: 9881)

Most Active Art Unit
2901
Art Unit(s)
2900, 2912, 2901, 2902
Total Applications
4468
Issued Applications
4372
Pending Applications
0
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4941792 [patent_doc_number] => 20080079115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Electronic device including an inductor and a process of forming the same' [patent_app_type] => utility [patent_app_number] => 11/540614 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9616 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20080079115.pdf [firstpage_image] =>[orig_patent_app_number] => 11540614 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/540614
Process of forming an electronic device including an inductor Sep 28, 2006 Issued
Array ( [id] => 267075 [patent_doc_number] => 07566600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'SOI device with reduced drain induced barrier lowering' [patent_app_type] => utility [patent_app_number] => 11/529899 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3854 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/566/07566600.pdf [firstpage_image] =>[orig_patent_app_number] => 11529899 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/529899
SOI device with reduced drain induced barrier lowering Sep 27, 2006 Issued
Array ( [id] => 5134853 [patent_doc_number] => 20070076482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/535693 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 21590 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20070076482.pdf [firstpage_image] =>[orig_patent_app_number] => 11535693 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/535693
Nonvolatile semiconductor memory device Sep 26, 2006 Issued
Array ( [id] => 4648807 [patent_doc_number] => 20080036062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'MULTI-CHIP STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/534574 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20080036062.pdf [firstpage_image] =>[orig_patent_app_number] => 11534574 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/534574
Multi-chip structure Sep 21, 2006 Issued
Array ( [id] => 5072993 [patent_doc_number] => 20070012968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Solid-state imaging device and camera' [patent_app_type] => utility [patent_app_number] => 11/523578 [patent_app_country] => US [patent_app_date] => 2006-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5337 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20070012968.pdf [firstpage_image] =>[orig_patent_app_number] => 11523578 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/523578
Solid-state imaging device and camera Sep 19, 2006 Abandoned
Array ( [id] => 217075 [patent_doc_number] => 07611985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-03 [patent_title] => 'Formation of holes in substrates using dewetting coatings' [patent_app_type] => utility [patent_app_number] => 11/533653 [patent_app_country] => US [patent_app_date] => 2006-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3161 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/611/07611985.pdf [firstpage_image] =>[orig_patent_app_number] => 11533653 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/533653
Formation of holes in substrates using dewetting coatings Sep 19, 2006 Issued
Array ( [id] => 5072994 [patent_doc_number] => 20070012969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Transparent metal shielded isolation for image sensors' [patent_app_type] => utility [patent_app_number] => 11/523697 [patent_app_country] => US [patent_app_date] => 2006-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4146 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20070012969.pdf [firstpage_image] =>[orig_patent_app_number] => 11523697 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/523697
Transparent metal shielded isolation for image sensors Sep 19, 2006 Issued
Array ( [id] => 185993 [patent_doc_number] => 07646054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-12 [patent_title] => 'Array of non-volatile memory cells with floating gates formed of spacers in substrate trenches' [patent_app_type] => utility [patent_app_number] => 11/533313 [patent_app_country] => US [patent_app_date] => 2006-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9720 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/646/07646054.pdf [firstpage_image] =>[orig_patent_app_number] => 11533313 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/533313
Array of non-volatile memory cells with floating gates formed of spacers in substrate trenches Sep 18, 2006 Issued
Array ( [id] => 4919180 [patent_doc_number] => 20080067492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Three-dimensional phase-change memory' [patent_app_type] => utility [patent_app_number] => 11/522584 [patent_app_country] => US [patent_app_date] => 2006-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9976 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20080067492.pdf [firstpage_image] =>[orig_patent_app_number] => 11522584 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/522584
Three-dimensional phase-change memory Sep 17, 2006 Issued
Array ( [id] => 356570 [patent_doc_number] => 07489008 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-02-10 [patent_title] => 'High Ion/Ioff SOI MOSFET using body voltage control' [patent_app_type] => utility [patent_app_number] => 11/522037 [patent_app_country] => US [patent_app_date] => 2006-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4337 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/489/07489008.pdf [firstpage_image] =>[orig_patent_app_number] => 11522037 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/522037
High Ion/Ioff SOI MOSFET using body voltage control Sep 15, 2006 Issued
Array ( [id] => 322945 [patent_doc_number] => 07518178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/531933 [patent_app_country] => US [patent_app_date] => 2006-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 12780 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518178.pdf [firstpage_image] =>[orig_patent_app_number] => 11531933 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/531933
Semiconductor memory device Sep 13, 2006 Issued
Array ( [id] => 865484 [patent_doc_number] => 07368774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Capacitor and its manufacturing method, ferroelectric memory device, actuator, and liquid jetting head' [patent_app_type] => utility [patent_app_number] => 11/531424 [patent_app_country] => US [patent_app_date] => 2006-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 6222 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368774.pdf [firstpage_image] =>[orig_patent_app_number] => 11531424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/531424
Capacitor and its manufacturing method, ferroelectric memory device, actuator, and liquid jetting head Sep 12, 2006 Issued
Array ( [id] => 5239673 [patent_doc_number] => 20070018164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Semiconductor Device and Manufacturing Method Thereof' [patent_app_type] => utility [patent_app_number] => 11/530353 [patent_app_country] => US [patent_app_date] => 2006-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18543 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018164.pdf [firstpage_image] =>[orig_patent_app_number] => 11530353 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/530353
Semiconductor device and manufacturing method thereof Sep 7, 2006 Issued
Array ( [id] => 5026217 [patent_doc_number] => 20070267663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-22 [patent_title] => 'Semiconductor device having improved insulated gate bipolar transistor and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/514994 [patent_app_country] => US [patent_app_date] => 2006-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5703 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20070267663.pdf [firstpage_image] =>[orig_patent_app_number] => 11514994 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/514994
Semiconductor device having improved insulated gate bipolar transistor and method for manufacturing the same Sep 4, 2006 Issued
Array ( [id] => 5181880 [patent_doc_number] => 20070053223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Non-Volatile Memory Devices Having L-Shaped Floating Gate Electrodes and Methods of Forming Same' [patent_app_type] => utility [patent_app_number] => 11/468085 [patent_app_country] => US [patent_app_date] => 2006-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 9360 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20070053223.pdf [firstpage_image] =>[orig_patent_app_number] => 11468085 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/468085
Non-Volatile Memory Devices Having L-Shaped Floating Gate Electrodes and Methods of Forming Same Aug 28, 2006 Abandoned
Array ( [id] => 5599586 [patent_doc_number] => 20060289931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Recessed gate structures including blocking members, methods of forming the same, semiconductor devices having the recessed gate structures and methods of forming the semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/507753 [patent_app_country] => US [patent_app_date] => 2006-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 16077 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20060289931.pdf [firstpage_image] =>[orig_patent_app_number] => 11507753 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/507753
Recessed gate structures including blocking members, methods of forming the same, semiconductor devices having the recessed gate structures and methods of forming the semiconductor devices Aug 21, 2006 Abandoned
Array ( [id] => 152300 [patent_doc_number] => 07683422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Non-volatile memory devices with wraparound-shaped floating gate electrodes and methods of forming same' [patent_app_type] => utility [patent_app_number] => 11/464324 [patent_app_country] => US [patent_app_date] => 2006-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 35 [patent_no_of_words] => 5632 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/683/07683422.pdf [firstpage_image] =>[orig_patent_app_number] => 11464324 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/464324
Non-volatile memory devices with wraparound-shaped floating gate electrodes and methods of forming same Aug 13, 2006 Issued
Array ( [id] => 330839 [patent_doc_number] => 07511337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-31 [patent_title] => 'Recess gate type transistor' [patent_app_type] => utility [patent_app_number] => 11/501943 [patent_app_country] => US [patent_app_date] => 2006-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3942 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/511/07511337.pdf [firstpage_image] =>[orig_patent_app_number] => 11501943 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/501943
Recess gate type transistor Aug 9, 2006 Issued
Array ( [id] => 5608622 [patent_doc_number] => 20060270138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Transistors having a recessed channel region and methods of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/499946 [patent_app_country] => US [patent_app_date] => 2006-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6587 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20060270138.pdf [firstpage_image] =>[orig_patent_app_number] => 11499946 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/499946
Transistors having a recessed channel region and methods of fabricating the same Aug 6, 2006 Abandoned
Array ( [id] => 282153 [patent_doc_number] => 07554154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Bottom source LDMOSFET structure and method' [patent_app_type] => utility [patent_app_number] => 11/495803 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 5573 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/554/07554154.pdf [firstpage_image] =>[orig_patent_app_number] => 11495803 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/495803
Bottom source LDMOSFET structure and method Jul 27, 2006 Issued
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