
Barbara J Bullock
Examiner (ID: 9881)
Most Active Art Unit | 2901 |
Art Unit(s) | 2900, 2912, 2901, 2902 |
Total Applications | 4468 |
Issued Applications | 4372 |
Pending Applications | 0 |
Abandoned Applications | 96 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 915253
[patent_doc_number] => 07326952
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-05
[patent_title] => 'Elevated pore phase-change memory'
[patent_app_type] => utility
[patent_app_number] => 10/839311
[patent_app_country] => US
[patent_app_date] => 2004-05-05
[patent_effective_date] => 0000-00-00
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/326/07326952.pdf
[firstpage_image] =>[orig_patent_app_number] => 10839311
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/839311 | Elevated pore phase-change memory | May 4, 2004 | Issued |
Array
(
[id] => 7030944
[patent_doc_number] => 20050029592
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-10
[patent_title] => 'Method and structure for buried circuits and devices'
[patent_app_type] => utility
[patent_app_number] => 10/832894
[patent_app_country] => US
[patent_app_date] => 2004-04-27
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[firstpage_image] =>[orig_patent_app_number] => 10832894
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/832894 | Method and structure for buried circuits and devices | Apr 26, 2004 | Issued |
Array
(
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[patent_doc_number] => 20040256698
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'METHOD FOR IMAGE REVERSAL OF IMPLANT RESIST USING A SINGLE PHOTOLITHOGRAPHY EXPOSURE AND STRUCTURES FORMED THEREBY'
[patent_app_type] => new
[patent_app_number] => 10/709285
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Array
(
[id] => 7462469
[patent_doc_number] => 20040198007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-07
[patent_title] => 'Semiconductor device having a metal silicide layer and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/823544
[patent_app_country] => US
[patent_app_date] => 2004-04-14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/823544 | Semiconductor device having a metal silicide layer and method for manufacturing the same | Apr 13, 2004 | Abandoned |
Array
(
[id] => 7344330
[patent_doc_number] => 20040192046
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-30
[patent_title] => 'Highly selective silicon oxide etching compositions'
[patent_app_type] => new
[patent_app_number] => 10/817563
[patent_app_country] => US
[patent_app_date] => 2004-04-02
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/817563 | Highly selective silicon oxide etching compositions | Apr 1, 2004 | Issued |
Array
(
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[patent_issue_date] => 2004-09-23
[patent_title] => 'Magnetic tunneling junction element having thin composite oxide film'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/813694 | Magnetic tunneling junction element having thin composite oxide film | Mar 30, 2004 | Issued |
Array
(
[id] => 982607
[patent_doc_number] => 06927451
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[patent_kind] => B1
[patent_issue_date] => 2005-08-09
[patent_title] => 'Termination for trench MIS device having implanted drain-drift region'
[patent_app_type] => utility
[patent_app_number] => 10/811443
[patent_app_country] => US
[patent_app_date] => 2004-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
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[patent_no_of_words] => 10750
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[pdf_file] => patents/06/927/06927451.pdf
[firstpage_image] =>[orig_patent_app_number] => 10811443
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/811443 | Termination for trench MIS device having implanted drain-drift region | Mar 25, 2004 | Issued |
Array
(
[id] => 7272954
[patent_doc_number] => 20040232405
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[patent_kind] => A1
[patent_issue_date] => 2004-11-25
[patent_title] => 'High-temperature superconducting device and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/809924
[patent_app_country] => US
[patent_app_date] => 2004-03-26
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[patent_drawing_sheets_cnt] => 16
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[pdf_file] => publications/A1/0232/20040232405.pdf
[firstpage_image] =>[orig_patent_app_number] => 10809924
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/809924 | High-temperature superconducting device and manufacturing method thereof | Mar 25, 2004 | Issued |
Array
(
[id] => 6949803
[patent_doc_number] => 20050224897
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[patent_issue_date] => 2005-10-13
[patent_title] => 'High-K gate dielectric stack with buffer layer to improve threshold voltage characteristics'
[patent_app_type] => utility
[patent_app_number] => 10/809974
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/809974 | High-K gate dielectric stack with buffer layer to improve threshold voltage characteristics | Mar 25, 2004 | Abandoned |
Array
(
[id] => 6949713
[patent_doc_number] => 20050224807
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[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Low dielectric constant carbon films'
[patent_app_type] => utility
[patent_app_number] => 10/809243
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[patent_app_date] => 2004-03-25
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[firstpage_image] =>[orig_patent_app_number] => 10809243
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/809243 | Low dielectric constant carbon films | Mar 24, 2004 | Abandoned |
Array
(
[id] => 7333910
[patent_doc_number] => 20040188688
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[patent_issue_date] => 2004-09-30
[patent_title] => 'Semiconductor device and method for manufacturing the same'
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[patent_app_number] => 10/808343
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Array
(
[id] => 503033
[patent_doc_number] => 07205610
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[patent_title] => 'Source follower circuit or bootstrap circuit, driver circuit comprising such circuit, and display device comprising such driver circuit'
[patent_app_type] => utility
[patent_app_number] => 10/808344
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Array
(
[id] => 7338335
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[patent_title] => 'Terminal and thin-film transistor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/808333 | Terminal and thin-film transistor | Mar 24, 2004 | Abandoned |
Array
(
[id] => 982574
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[patent_title] => 'Thin film transistor substrate and manufacturing method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/808833 | Thin film transistor substrate and manufacturing method thereof | Mar 24, 2004 | Issued |
Array
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Array
(
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Array
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Array
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Array
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Array
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