Search

Barbara J Bullock

Examiner (ID: 9881)

Most Active Art Unit
2901
Art Unit(s)
2900, 2912, 2901, 2902
Total Applications
4468
Issued Applications
4372
Pending Applications
0
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 915253 [patent_doc_number] => 07326952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'Elevated pore phase-change memory' [patent_app_type] => utility [patent_app_number] => 10/839311 [patent_app_country] => US [patent_app_date] => 2004-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1774 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/326/07326952.pdf [firstpage_image] =>[orig_patent_app_number] => 10839311 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/839311
Elevated pore phase-change memory May 4, 2004 Issued
Array ( [id] => 7030944 [patent_doc_number] => 20050029592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Method and structure for buried circuits and devices' [patent_app_type] => utility [patent_app_number] => 10/832894 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9286 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029592.pdf [firstpage_image] =>[orig_patent_app_number] => 10832894 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/832894
Method and structure for buried circuits and devices Apr 26, 2004 Issued
Array ( [id] => 7235158 [patent_doc_number] => 20040256698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'METHOD FOR IMAGE REVERSAL OF IMPLANT RESIST USING A SINGLE PHOTOLITHOGRAPHY EXPOSURE AND STRUCTURES FORMED THEREBY' [patent_app_type] => new [patent_app_number] => 10/709285 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3342 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20040256698.pdf [firstpage_image] =>[orig_patent_app_number] => 10709285 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/709285
METHOD FOR IMAGE REVERSAL OF IMPLANT RESIST USING A SINGLE PHOTOLITHOGRAPHY EXPOSURE AND STRUCTURES FORMED THEREBY Apr 26, 2004 Abandoned
Array ( [id] => 7462469 [patent_doc_number] => 20040198007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Semiconductor device having a metal silicide layer and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/823544 [patent_app_country] => US [patent_app_date] => 2004-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20040198007.pdf [firstpage_image] =>[orig_patent_app_number] => 10823544 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/823544
Semiconductor device having a metal silicide layer and method for manufacturing the same Apr 13, 2004 Abandoned
Array ( [id] => 7344330 [patent_doc_number] => 20040192046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Highly selective silicon oxide etching compositions' [patent_app_type] => new [patent_app_number] => 10/817563 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3094 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20040192046.pdf [firstpage_image] =>[orig_patent_app_number] => 10817563 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/817563
Highly selective silicon oxide etching compositions Apr 1, 2004 Issued
Array ( [id] => 7420680 [patent_doc_number] => 20040183091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Magnetic tunneling junction element having thin composite oxide film' [patent_app_type] => new [patent_app_number] => 10/813694 [patent_app_country] => US [patent_app_date] => 2004-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5913 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183091.pdf [firstpage_image] =>[orig_patent_app_number] => 10813694 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/813694
Magnetic tunneling junction element having thin composite oxide film Mar 30, 2004 Issued
Array ( [id] => 982607 [patent_doc_number] => 06927451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-09 [patent_title] => 'Termination for trench MIS device having implanted drain-drift region' [patent_app_type] => utility [patent_app_number] => 10/811443 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 70 [patent_no_of_words] => 10750 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927451.pdf [firstpage_image] =>[orig_patent_app_number] => 10811443 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/811443
Termination for trench MIS device having implanted drain-drift region Mar 25, 2004 Issued
Array ( [id] => 7272954 [patent_doc_number] => 20040232405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'High-temperature superconducting device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/809924 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6151 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20040232405.pdf [firstpage_image] =>[orig_patent_app_number] => 10809924 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809924
High-temperature superconducting device and manufacturing method thereof Mar 25, 2004 Issued
Array ( [id] => 6949803 [patent_doc_number] => 20050224897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'High-K gate dielectric stack with buffer layer to improve threshold voltage characteristics' [patent_app_type] => utility [patent_app_number] => 10/809974 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3172 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224897.pdf [firstpage_image] =>[orig_patent_app_number] => 10809974 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809974
High-K gate dielectric stack with buffer layer to improve threshold voltage characteristics Mar 25, 2004 Abandoned
Array ( [id] => 6949713 [patent_doc_number] => 20050224807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Low dielectric constant carbon films' [patent_app_type] => utility [patent_app_number] => 10/809243 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1225 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224807.pdf [firstpage_image] =>[orig_patent_app_number] => 10809243 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809243
Low dielectric constant carbon films Mar 24, 2004 Abandoned
Array ( [id] => 7333910 [patent_doc_number] => 20040188688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/808343 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12798 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188688.pdf [firstpage_image] =>[orig_patent_app_number] => 10808343 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/808343
Semiconductor device and method for manufacturing the same Mar 24, 2004 Issued
Array ( [id] => 503033 [patent_doc_number] => 07205610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Source follower circuit or bootstrap circuit, driver circuit comprising such circuit, and display device comprising such driver circuit' [patent_app_type] => utility [patent_app_number] => 10/808344 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 4610 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205610.pdf [firstpage_image] =>[orig_patent_app_number] => 10808344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/808344
Source follower circuit or bootstrap circuit, driver circuit comprising such circuit, and display device comprising such driver circuit Mar 24, 2004 Issued
Array ( [id] => 7338335 [patent_doc_number] => 20040245527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Terminal and thin-film transistor' [patent_app_type] => new [patent_app_number] => 10/808333 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245527.pdf [firstpage_image] =>[orig_patent_app_number] => 10808333 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/808333
Terminal and thin-film transistor Mar 24, 2004 Abandoned
Array ( [id] => 982574 [patent_doc_number] => 06927418 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Thin film transistor substrate and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/808833 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 170 [patent_no_of_words] => 16064 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927418.pdf [firstpage_image] =>[orig_patent_app_number] => 10808833 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/808833
Thin film transistor substrate and manufacturing method thereof Mar 24, 2004 Issued
Array ( [id] => 6955694 [patent_doc_number] => 20050212064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Transistor with reduced gate-to-source capacitance and method therefor' [patent_app_type] => utility [patent_app_number] => 10/807624 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1978 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20050212064.pdf [firstpage_image] =>[orig_patent_app_number] => 10807624 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/807624
Transistor with reduced gate-to-source capacitance and method therefor Mar 23, 2004 Issued
Array ( [id] => 322974 [patent_doc_number] => 07518207 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-04-14 [patent_title] => 'Molecular beam epitaxy growth of ternary and quaternary metal chalcogenide films' [patent_app_type] => utility [patent_app_number] => 10/807714 [patent_app_country] => US [patent_app_date] => 2004-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5576 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518207.pdf [firstpage_image] =>[orig_patent_app_number] => 10807714 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/807714
Molecular beam epitaxy growth of ternary and quaternary metal chalcogenide films Mar 18, 2004 Issued
Array ( [id] => 7108557 [patent_doc_number] => 20050206010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Multi-flip chip on lead frame on over molded IC package and method of assembly' [patent_app_type] => utility [patent_app_number] => 10/803464 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3143 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20050206010.pdf [firstpage_image] =>[orig_patent_app_number] => 10803464 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/803464
Multi-flip chip on lead frame on over molded IC package and method of assembly Mar 17, 2004 Issued
Array ( [id] => 539786 [patent_doc_number] => 07176530 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-02-13 [patent_title] => 'Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor' [patent_app_type] => utility [patent_app_number] => 10/803203 [patent_app_country] => US [patent_app_date] => 2004-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 57 [patent_no_of_words] => 36484 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/176/07176530.pdf [firstpage_image] =>[orig_patent_app_number] => 10803203 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/803203
Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor Mar 16, 2004 Issued
Array ( [id] => 7420733 [patent_doc_number] => 20040183101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Semiconductor devices having dual capping layer patterns and methods of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/803064 [patent_app_country] => US [patent_app_date] => 2004-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183101.pdf [firstpage_image] =>[orig_patent_app_number] => 10803064 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/803064
Semiconductor devices having dual capping layer patterns and methods of manufacturing the same Mar 15, 2004 Issued
Array ( [id] => 7252976 [patent_doc_number] => 20050074972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/796183 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9583 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20050074972.pdf [firstpage_image] =>[orig_patent_app_number] => 10796183 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/796183
Semiconductor device and method of manufacturing the same Mar 9, 2004 Abandoned
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