Search

Barbara J Bullock

Examiner (ID: 9881)

Most Active Art Unit
2901
Art Unit(s)
2900, 2912, 2901, 2902
Total Applications
4468
Issued Applications
4372
Pending Applications
0
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1514546 [patent_doc_number] => 06420259 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Formation of a self-aligned structure' [patent_app_type] => B1 [patent_app_number] => 09/634075 [patent_app_country] => US [patent_app_date] => 2000-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2864 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420259.pdf [firstpage_image] =>[orig_patent_app_number] => 09634075 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/634075
Formation of a self-aligned structure Aug 7, 2000 Issued
Array ( [id] => 1554690 [patent_doc_number] => 06348730 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'Semiconductor device and fabricating method therefor' [patent_app_type] => B1 [patent_app_number] => 09/631590 [patent_app_country] => US [patent_app_date] => 2000-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3381 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/348/06348730.pdf [firstpage_image] =>[orig_patent_app_number] => 09631590 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/631590
Semiconductor device and fabricating method therefor Aug 2, 2000 Issued
Array ( [id] => 4366609 [patent_doc_number] => 06274475 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Specialized metal profile for via landing areas' [patent_app_type] => 1 [patent_app_number] => 9/630813 [patent_app_country] => US [patent_app_date] => 2000-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4098 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274475.pdf [firstpage_image] =>[orig_patent_app_number] => 630813 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/630813
Specialized metal profile for via landing areas Aug 1, 2000 Issued
Array ( [id] => 961338 [patent_doc_number] => 06952051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-04 [patent_title] => 'Interlevel dielectric structure' [patent_app_type] => utility [patent_app_number] => 09/627649 [patent_app_country] => US [patent_app_date] => 2000-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3410 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/952/06952051.pdf [firstpage_image] =>[orig_patent_app_number] => 09627649 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/627649
Interlevel dielectric structure Jul 27, 2000 Issued
Array ( [id] => 1071879 [patent_doc_number] => 06841463 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Interlevel dielectric structure and method of forming same' [patent_app_type] => utility [patent_app_number] => 09/627381 [patent_app_country] => US [patent_app_date] => 2000-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3408 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841463.pdf [firstpage_image] =>[orig_patent_app_number] => 09627381 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/627381
Interlevel dielectric structure and method of forming same Jul 27, 2000 Issued
Array ( [id] => 613171 [patent_doc_number] => 07148571 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-12-12 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 09/627418 [patent_app_country] => US [patent_app_date] => 2000-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 53 [patent_no_of_words] => 6955 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/148/07148571.pdf [firstpage_image] =>[orig_patent_app_number] => 09627418 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/627418
Semiconductor device and method of manufacturing the same Jul 26, 2000 Issued
Array ( [id] => 7645253 [patent_doc_number] => 06472719 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Method of manufacturing air gap in multilevel interconnection' [patent_app_type] => B1 [patent_app_number] => 09/624024 [patent_app_country] => US [patent_app_date] => 2000-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 2772 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472719.pdf [firstpage_image] =>[orig_patent_app_number] => 09624024 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/624024
Method of manufacturing air gap in multilevel interconnection Jul 23, 2000 Issued
Array ( [id] => 1385026 [patent_doc_number] => 06559542 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/615328 [patent_app_country] => US [patent_app_date] => 2000-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2712 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559542.pdf [firstpage_image] =>[orig_patent_app_number] => 09615328 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/615328
Semiconductor device and method of manufacturing the same Jul 11, 2000 Issued
Array ( [id] => 1537222 [patent_doc_number] => 06337516 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Technique for extending the limits of photolithography' [patent_app_type] => B1 [patent_app_number] => 09/609380 [patent_app_country] => US [patent_app_date] => 2000-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 2848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/337/06337516.pdf [firstpage_image] =>[orig_patent_app_number] => 09609380 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/609380
Technique for extending the limits of photolithography Jul 2, 2000 Issued
Array ( [id] => 7629817 [patent_doc_number] => 06818539 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Semiconductor devices and methods of fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/607219 [patent_app_country] => US [patent_app_date] => 2000-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4957 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/818/06818539.pdf [firstpage_image] =>[orig_patent_app_number] => 09607219 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/607219
Semiconductor devices and methods of fabricating the same Jun 29, 2000 Issued
Array ( [id] => 1351920 [patent_doc_number] => 06583459 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Random access memory cell and method for fabricating same' [patent_app_type] => B1 [patent_app_number] => 09/607780 [patent_app_country] => US [patent_app_date] => 2000-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5269 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/583/06583459.pdf [firstpage_image] =>[orig_patent_app_number] => 09607780 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/607780
Random access memory cell and method for fabricating same Jun 29, 2000 Issued
Array ( [id] => 4407638 [patent_doc_number] => 06239022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method of fabricating a contact in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/604708 [patent_app_country] => US [patent_app_date] => 2000-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4219 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239022.pdf [firstpage_image] =>[orig_patent_app_number] => 604708 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/604708
Method of fabricating a contact in a semiconductor device Jun 26, 2000 Issued
Array ( [id] => 1566242 [patent_doc_number] => 06339239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'DRAM cell layout for node capacitance enhancement' [patent_app_type] => B1 [patent_app_number] => 09/603439 [patent_app_country] => US [patent_app_date] => 2000-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2848 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339239.pdf [firstpage_image] =>[orig_patent_app_number] => 09603439 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/603439
DRAM cell layout for node capacitance enhancement Jun 22, 2000 Issued
Array ( [id] => 4420467 [patent_doc_number] => 06225202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Selective etching of unreacted nickel after salicidation' [patent_app_type] => 1 [patent_app_number] => 9/598689 [patent_app_country] => US [patent_app_date] => 2000-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2023 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225202.pdf [firstpage_image] =>[orig_patent_app_number] => 598689 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/598689
Selective etching of unreacted nickel after salicidation Jun 20, 2000 Issued
Array ( [id] => 4419712 [patent_doc_number] => 06177341 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method for forming interconnections in semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/594959 [patent_app_country] => US [patent_app_date] => 2000-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3319 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177341.pdf [firstpage_image] =>[orig_patent_app_number] => 594959 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/594959
Method for forming interconnections in semiconductor devices Jun 14, 2000 Issued
Array ( [id] => 4405802 [patent_doc_number] => 06232217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Post treatment of via opening by N-containing plasma or H-containing plasma for elimination of fluorine species in the FSG near the surfaces of the via opening' [patent_app_type] => 1 [patent_app_number] => 9/584429 [patent_app_country] => US [patent_app_date] => 2000-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2890 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232217.pdf [firstpage_image] =>[orig_patent_app_number] => 584429 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/584429
Post treatment of via opening by N-containing plasma or H-containing plasma for elimination of fluorine species in the FSG near the surfaces of the via opening Jun 4, 2000 Issued
Array ( [id] => 7629365 [patent_doc_number] => 06818991 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Copper-alloy interconnection layer' [patent_app_type] => B1 [patent_app_number] => 09/584739 [patent_app_country] => US [patent_app_date] => 2000-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16970 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/818/06818991.pdf [firstpage_image] =>[orig_patent_app_number] => 09584739 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/584739
Copper-alloy interconnection layer May 31, 2000 Issued
Array ( [id] => 4267463 [patent_doc_number] => 06306756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Method for production of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/580922 [patent_app_country] => US [patent_app_date] => 2000-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 68 [patent_no_of_words] => 31541 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/306/06306756.pdf [firstpage_image] =>[orig_patent_app_number] => 580922 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/580922
Method for production of semiconductor device May 25, 2000 Issued
Array ( [id] => 1594480 [patent_doc_number] => 06383898 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method for manufacturing photoelectric conversion device' [patent_app_type] => B1 [patent_app_number] => 09/577879 [patent_app_country] => US [patent_app_date] => 2000-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 11420 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383898.pdf [firstpage_image] =>[orig_patent_app_number] => 09577879 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/577879
Method for manufacturing photoelectric conversion device May 24, 2000 Issued
Array ( [id] => 4293761 [patent_doc_number] => 06184072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Process for forming a high-K gate dielectric' [patent_app_type] => 1 [patent_app_number] => 9/571588 [patent_app_country] => US [patent_app_date] => 2000-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 2110 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184072.pdf [firstpage_image] =>[orig_patent_app_number] => 571588 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/571588
Process for forming a high-K gate dielectric May 16, 2000 Issued
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