Search

Barbara J Bullock

Examiner (ID: 9881)

Most Active Art Unit
2901
Art Unit(s)
2900, 2912, 2901, 2902
Total Applications
4468
Issued Applications
4372
Pending Applications
0
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4366175 [patent_doc_number] => 06274445 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Method of manufacturing shallow source/drain junctions in a salicide process' [patent_app_type] => 1 [patent_app_number] => 9/243739 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3358 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274445.pdf [firstpage_image] =>[orig_patent_app_number] => 243739 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243739
Method of manufacturing shallow source/drain junctions in a salicide process Feb 2, 1999 Issued
Array ( [id] => 4385337 [patent_doc_number] => 06303952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Contact structure with an oxide silicidation barrier' [patent_app_type] => 1 [patent_app_number] => 9/226238 [patent_app_country] => US [patent_app_date] => 1999-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2222 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303952.pdf [firstpage_image] =>[orig_patent_app_number] => 226238 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/226238
Contact structure with an oxide silicidation barrier Jan 4, 1999 Issued
Array ( [id] => 4270408 [patent_doc_number] => 06245664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Method and system of interconnecting conductive elements in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/218829 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4826 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/245/06245664.pdf [firstpage_image] =>[orig_patent_app_number] => 218829 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/218829
Method and system of interconnecting conductive elements in an integrated circuit Dec 21, 1998 Issued
09/217109 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF Dec 20, 1998 Abandoned
Array ( [id] => 4102196 [patent_doc_number] => 06100180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Formation of a self-aligned integrated circuit structure using planarization to form a top surface' [patent_app_type] => 1 [patent_app_number] => 9/218791 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2804 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100180.pdf [firstpage_image] =>[orig_patent_app_number] => 218791 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/218791
Formation of a self-aligned integrated circuit structure using planarization to form a top surface Dec 20, 1998 Issued
Array ( [id] => 4364876 [patent_doc_number] => 06191481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Electromigration impeding composite metallization lines and methods for making the same' [patent_app_type] => 1 [patent_app_number] => 9/215099 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5334 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191481.pdf [firstpage_image] =>[orig_patent_app_number] => 215099 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215099
Electromigration impeding composite metallization lines and methods for making the same Dec 17, 1998 Issued
Array ( [id] => 4070696 [patent_doc_number] => 06069045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Method of forming C49-structure tungsten-containing titanium salicide structure' [patent_app_type] => 1 [patent_app_number] => 9/213437 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 26 [patent_no_of_words] => 19715 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069045.pdf [firstpage_image] =>[orig_patent_app_number] => 213437 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/213437
Method of forming C49-structure tungsten-containing titanium salicide structure Dec 16, 1998 Issued
Array ( [id] => 4070833 [patent_doc_number] => 05970370 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Manufacturing capping layer for the fabrication of cobalt salicide structures' [patent_app_type] => 1 [patent_app_number] => 9/208597 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 4386 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970370.pdf [firstpage_image] =>[orig_patent_app_number] => 208597 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208597
Manufacturing capping layer for the fabrication of cobalt salicide structures Dec 7, 1998 Issued
Array ( [id] => 4136690 [patent_doc_number] => 06015747 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method of metal/polysilicon gate formation in a field effect transistor' [patent_app_type] => 1 [patent_app_number] => 9/206799 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3460 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015747.pdf [firstpage_image] =>[orig_patent_app_number] => 206799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206799
Method of metal/polysilicon gate formation in a field effect transistor Dec 6, 1998 Issued
Array ( [id] => 1550963 [patent_doc_number] => 06346741 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Compositions and structures for chemical mechanical polishing of FeRAM capacitors and method of fabricating FeRAM capacitors using same' [patent_app_type] => B1 [patent_app_number] => 09/200499 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 9804 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346741.pdf [firstpage_image] =>[orig_patent_app_number] => 09200499 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/200499
Compositions and structures for chemical mechanical polishing of FeRAM capacitors and method of fabricating FeRAM capacitors using same Nov 24, 1998 Issued
Array ( [id] => 4131582 [patent_doc_number] => 06146983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Method of making semiconductor device having sacrificial salicidation layer' [patent_app_type] => 1 [patent_app_number] => 9/193619 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2774 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/146/06146983.pdf [firstpage_image] =>[orig_patent_app_number] => 193619 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193619
Method of making semiconductor device having sacrificial salicidation layer Nov 16, 1998 Issued
Array ( [id] => 6837220 [patent_doc_number] => 20030034560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'WIRING STRUCTURE OF SEMICONDUCTOR DEVICE, ELECTRODE, AND METHOD FOR FORMING THEM' [patent_app_type] => new [patent_app_number] => 09/530588 [patent_app_country] => US [patent_app_date] => 2000-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7161 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034560.pdf [firstpage_image] =>[orig_patent_app_number] => 09530588 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/530588
Method of forming semiconductor wiring structures Nov 4, 1998 Issued
Array ( [id] => 4004634 [patent_doc_number] => 05960314 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Semiconductor processing method of providing an electrically conductive interconnecting plug between an elevationally conductive node and an elevationally outer electrically conductive node' [patent_app_type] => 1 [patent_app_number] => 9/156231 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2274 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/960/05960314.pdf [firstpage_image] =>[orig_patent_app_number] => 156231 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156231
Semiconductor processing method of providing an electrically conductive interconnecting plug between an elevationally conductive node and an elevationally outer electrically conductive node Sep 17, 1998 Issued
Array ( [id] => 3999073 [patent_doc_number] => 05920098 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Tungsten local interconnect, using a silicon nitride capped self-aligned contact process' [patent_app_type] => 1 [patent_app_number] => 9/148554 [patent_app_country] => US [patent_app_date] => 1998-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2607 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 425 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920098.pdf [firstpage_image] =>[orig_patent_app_number] => 148554 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/148554
Tungsten local interconnect, using a silicon nitride capped self-aligned contact process Sep 3, 1998 Issued
Array ( [id] => 1281153 [patent_doc_number] => 06642140 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'System for filling openings in semiconductor products' [patent_app_type] => B1 [patent_app_number] => 09/146519 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4214 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642140.pdf [firstpage_image] =>[orig_patent_app_number] => 09146519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146519
System for filling openings in semiconductor products Sep 2, 1998 Issued
Array ( [id] => 4303092 [patent_doc_number] => 06187673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Small grain size, conformal aluminum interconnects and method for their formation' [patent_app_type] => 1 [patent_app_number] => 9/146509 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3200 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/187/06187673.pdf [firstpage_image] =>[orig_patent_app_number] => 146509 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146509
Small grain size, conformal aluminum interconnects and method for their formation Sep 2, 1998 Issued
Array ( [id] => 4152596 [patent_doc_number] => 06124205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Contact/via force fill process' [patent_app_type] => 1 [patent_app_number] => 9/146719 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4063 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124205.pdf [firstpage_image] =>[orig_patent_app_number] => 146719 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146719
Contact/via force fill process Sep 2, 1998 Issued
Array ( [id] => 4182718 [patent_doc_number] => 06150257 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Plasma treatment of an interconnect surface during formation of an interlayer dielectric' [patent_app_type] => 1 [patent_app_number] => 9/143289 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4904 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150257.pdf [firstpage_image] =>[orig_patent_app_number] => 143289 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/143289
Plasma treatment of an interconnect surface during formation of an interlayer dielectric Aug 27, 1998 Issued
Array ( [id] => 4237615 [patent_doc_number] => 06090706 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Preconditioning process for treating deposition chamber prior to deposition of tungsten silicide coating on active substrates therein' [patent_app_type] => 1 [patent_app_number] => 9/140818 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/090/06090706.pdf [firstpage_image] =>[orig_patent_app_number] => 140818 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/140818
Preconditioning process for treating deposition chamber prior to deposition of tungsten silicide coating on active substrates therein Aug 25, 1998 Issued
Array ( [id] => 4003085 [patent_doc_number] => 06004870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Method for forming a self-aligned contact' [patent_app_type] => 1 [patent_app_number] => 9/136698 [patent_app_country] => US [patent_app_date] => 1998-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 1704 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/004/06004870.pdf [firstpage_image] =>[orig_patent_app_number] => 136698 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/136698
Method for forming a self-aligned contact Aug 18, 1998 Issued
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