
Barbara J Bullock
Examiner (ID: 9881)
Most Active Art Unit | 2901 |
Art Unit(s) | 2900, 2912, 2901, 2902 |
Total Applications | 4468 |
Issued Applications | 4372 |
Pending Applications | 0 |
Abandoned Applications | 96 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4206956
[patent_doc_number] => 06027995
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[patent_issue_date] => 2000-02-22
[patent_title] => 'Method for fabricating an interconnect structure with hard mask and low dielectric constant materials'
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[patent_app_number] => 9/135618
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[patent_app_date] => 1998-08-18
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[pdf_file] => patents/06/027/06027995.pdf
[firstpage_image] =>[orig_patent_app_number] => 135618
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Array
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[patent_issue_date] => 2000-12-19
[patent_title] => 'Method of forming gate electrode connection structure by in situ chemical vapor deposition of tungsten and tungsten nitride'
[patent_app_type] => 1
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Array
(
[id] => 1336485
[patent_doc_number] => 06593233
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[patent_kind] => B1
[patent_issue_date] => 2003-07-15
[patent_title] => 'Semiconductor device and method for manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/093819
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Array
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[patent_issue_date] => 2000-09-19
[patent_title] => 'Methods of forming power semiconductor devices having merged split-well body regions therein'
[patent_app_type] => 1
[patent_app_number] => 9/092334
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[patent_app_date] => 1998-06-05
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Array
(
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[patent_title] => 'Semiconductor processing method of forming a buried contact'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/087133 | Semiconductor processing method of forming a buried contact | May 28, 1998 | Issued |
Array
(
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[patent_title] => 'Self-aligned metallurgy'
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Array
(
[id] => 3944646
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[patent_title] => 'Method for forming improved electrical contacts on non-planar structures'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/069388 | Method for forming improved electrical contacts on non-planar structures | Apr 28, 1998 | Issued |
Array
(
[id] => 4085115
[patent_doc_number] => 06025264
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[patent_issue_date] => 2000-02-15
[patent_title] => 'Fabricating method of a barrier layer'
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[firstpage_image] =>[orig_patent_app_number] => 052608
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/052608 | Fabricating method of a barrier layer | Mar 30, 1998 | Issued |
Array
(
[id] => 4031428
[patent_doc_number] => 05907781
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[patent_title] => 'Process for fabricating an integrated circuit with a self-aligned contact'
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Array
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[id] => 3937934
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[patent_issue_date] => 1999-11-09
[patent_title] => 'PVD deposition process for CVD aluminum liner processing'
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[patent_app_number] => 9/042199
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/042199 | PVD deposition process for CVD aluminum liner processing | Mar 12, 1998 | Issued |
Array
(
[id] => 3953447
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[patent_title] => 'Metal plug electrode in semiconductor device and method for forming the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/027346 | Metal plug electrode in semiconductor device and method for forming the same | Feb 19, 1998 | Issued |
Array
(
[id] => 3942067
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/022009 | Method for manufacturing semiconductor device | Feb 10, 1998 | Issued |
Array
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[patent_title] => 'Method of manufacturing charge-coupled device having different light-receiving region and charge-isolating layer structures'
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Array
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[patent_title] => 'Reduced temperature contact/via filling'
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Array
(
[id] => 4420584
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Array
(
[id] => 1209395
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[patent_title] => 'Contact integration method'
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09/006309 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Jan 12, 1998 | Issued |
Array
(
[id] => 4057187
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Array
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Array
(
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