Search

Barbara J Bullock

Examiner (ID: 9881)

Most Active Art Unit
2901
Art Unit(s)
2900, 2912, 2901, 2902
Total Applications
4468
Issued Applications
4372
Pending Applications
0
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
08/205246 PROCESS FOR FABRICATING CONNECTION STRUCTURES Mar 2, 1994 Abandoned
08/202532 PROVIDING A LOW RESISTANCE TO INTEGRATED CIRCUIT DEVICES Feb 27, 1994 Abandoned
Array ( [id] => 3488996 [patent_doc_number] => 05470794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Method for forming a silicide using ion beam mixing' [patent_app_type] => 1 [patent_app_number] => 8/200628 [patent_app_country] => US [patent_app_date] => 1994-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4527 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/470/05470794.pdf [firstpage_image] =>[orig_patent_app_number] => 200628 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/200628
Method for forming a silicide using ion beam mixing Feb 22, 1994 Issued
08/195714 SEMICONDUCTOR AND PROCESS FOR FABRICATING THE SAME Feb 13, 1994 Abandoned
Array ( [id] => 3444279 [patent_doc_number] => 05420070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-30 [patent_title] => 'Manufacturing method of interconnection structure of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/192910 [patent_app_country] => US [patent_app_date] => 1994-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 7908 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/420/05420070.pdf [firstpage_image] =>[orig_patent_app_number] => 192910 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/192910
Manufacturing method of interconnection structure of semiconductor device Feb 6, 1994 Issued
Array ( [id] => 3444310 [patent_doc_number] => 05420072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-30 [patent_title] => 'Method for forming a conductive interconnect in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/191896 [patent_app_country] => US [patent_app_date] => 1994-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/420/05420072.pdf [firstpage_image] =>[orig_patent_app_number] => 191896 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/191896
Method for forming a conductive interconnect in an integrated circuit Feb 3, 1994 Issued
Array ( [id] => 3623179 [patent_doc_number] => 05607884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Method for fabricating MOS transistor having source/drain region of shallow junction and silicide film' [patent_app_type] => 1 [patent_app_number] => 8/190664 [patent_app_country] => US [patent_app_date] => 1994-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 3511 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/607/05607884.pdf [firstpage_image] =>[orig_patent_app_number] => 190664 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/190664
Method for fabricating MOS transistor having source/drain region of shallow junction and silicide film Feb 1, 1994 Issued
08/187472 METHOD FOR FORMING AN ALUMINUM FILM USED AS AN INTERCONNECT IN A SEMICONDUCTOR DEVICE Jan 27, 1994 Abandoned
Array ( [id] => 3558622 [patent_doc_number] => 05500393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-19 [patent_title] => 'Method for fabricating a schottky junction' [patent_app_type] => 1 [patent_app_number] => 8/184105 [patent_app_country] => US [patent_app_date] => 1994-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4736 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/500/05500393.pdf [firstpage_image] =>[orig_patent_app_number] => 184105 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/184105
Method for fabricating a schottky junction Jan 20, 1994 Issued
Array ( [id] => 3441081 [patent_doc_number] => 05429985 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-04 [patent_title] => 'Fabrication of optically reflecting ohmic contacts for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/155386 [patent_app_country] => US [patent_app_date] => 1994-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4516 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/429/05429985.pdf [firstpage_image] =>[orig_patent_app_number] => 155386 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/155386
Fabrication of optically reflecting ohmic contacts for semiconductor devices Jan 17, 1994 Issued
Array ( [id] => 3427542 [patent_doc_number] => 05462892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Semiconductor processing method for preventing corrosion of metal film connections' [patent_app_type] => 1 [patent_app_number] => 8/180193 [patent_app_country] => US [patent_app_date] => 1994-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2704 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/462/05462892.pdf [firstpage_image] =>[orig_patent_app_number] => 180193 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/180193
Semiconductor processing method for preventing corrosion of metal film connections Jan 10, 1994 Issued
Array ( [id] => 1600494 [patent_doc_number] => 06475903 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Copper reflow process' [patent_app_type] => B1 [patent_app_number] => 08/175200 [patent_app_country] => US [patent_app_date] => 1993-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 5399 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/475/06475903.pdf [firstpage_image] =>[orig_patent_app_number] => 08175200 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/175200
Copper reflow process Dec 27, 1993 Issued
Array ( [id] => 3460145 [patent_doc_number] => 05391521 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-21 [patent_title] => 'Method for fabricating low resistance contacts of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/173552 [patent_app_country] => US [patent_app_date] => 1993-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1567 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/391/05391521.pdf [firstpage_image] =>[orig_patent_app_number] => 173552 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/173552
Method for fabricating low resistance contacts of semiconductor device Dec 26, 1993 Issued
08/172216 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Dec 22, 1993 Abandoned
Array ( [id] => 3552355 [patent_doc_number] => 05573965 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-12 [patent_title] => 'Method of fabricating semiconductor devices and integrated circuits using sidewall spacer technology' [patent_app_type] => 1 [patent_app_number] => 8/169482 [patent_app_country] => US [patent_app_date] => 1993-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2713 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/573/05573965.pdf [firstpage_image] =>[orig_patent_app_number] => 169482 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/169482
Method of fabricating semiconductor devices and integrated circuits using sidewall spacer technology Dec 16, 1993 Issued
08/169854 REFRACTORY METAL CONTACT FOR A POWER DEVICE Dec 16, 1993 Abandoned
Array ( [id] => 3694809 [patent_doc_number] => 05661080 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Method for fabricating tungsten plug' [patent_app_type] => 1 [patent_app_number] => 8/164960 [patent_app_country] => US [patent_app_date] => 1993-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1527 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661080.pdf [firstpage_image] =>[orig_patent_app_number] => 164960 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/164960
Method for fabricating tungsten plug Dec 9, 1993 Issued
Array ( [id] => 3453898 [patent_doc_number] => 05378648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-03 [patent_title] => 'Situ stringer removal during polysilicon capacitor cell plate delineation' [patent_app_type] => 1 [patent_app_number] => 8/161506 [patent_app_country] => US [patent_app_date] => 1993-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2133 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/378/05378648.pdf [firstpage_image] =>[orig_patent_app_number] => 161506 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/161506
Situ stringer removal during polysilicon capacitor cell plate delineation Dec 1, 1993 Issued
Array ( [id] => 3447974 [patent_doc_number] => 05424237 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-13 [patent_title] => 'Method of producing semiconductor device having a side wall film' [patent_app_type] => 1 [patent_app_number] => 8/159776 [patent_app_country] => US [patent_app_date] => 1993-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2977 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/424/05424237.pdf [firstpage_image] =>[orig_patent_app_number] => 159776 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/159776
Method of producing semiconductor device having a side wall film Dec 1, 1993 Issued
Array ( [id] => 3757333 [patent_doc_number] => 05721175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/159953 [patent_app_country] => US [patent_app_date] => 1993-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 11859 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721175.pdf [firstpage_image] =>[orig_patent_app_number] => 159953 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/159953
Method of manufacturing a semiconductor device Nov 30, 1993 Issued
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