Search

Barbara J Bullock

Examiner (ID: 9881)

Most Active Art Unit
2901
Art Unit(s)
2900, 2912, 2901, 2902
Total Applications
4468
Issued Applications
4372
Pending Applications
0
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3411148 [patent_doc_number] => 05411916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-02 [patent_title] => 'Method for patterning wirings of semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/077946 [patent_app_country] => US [patent_app_date] => 1993-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/411/05411916.pdf [firstpage_image] =>[orig_patent_app_number] => 077946 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/077946
Method for patterning wirings of semiconductor integrated circuit device Mar 17, 1993 Issued
Array ( [id] => 2967673 [patent_doc_number] => 05258328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-02 [patent_title] => 'Method of forming multilayered wiring structure of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/031324 [patent_app_country] => US [patent_app_date] => 1993-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 48 [patent_no_of_words] => 6635 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/258/05258328.pdf [firstpage_image] =>[orig_patent_app_number] => 031324 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/031324
Method of forming multilayered wiring structure of semiconductor device Mar 14, 1993 Issued
08/028428 METHOD OF PROCESSING A POLYSILICON FILM ON A SINGLE-CRYSTAL SILICON SUBSTRATE Mar 8, 1993 Pending
Array ( [id] => 3029422 [patent_doc_number] => 05342808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-30 [patent_title] => 'Aperture size control for etched vias and metal contacts' [patent_app_type] => 1 [patent_app_number] => 8/028643 [patent_app_country] => US [patent_app_date] => 1993-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2494 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/342/05342808.pdf [firstpage_image] =>[orig_patent_app_number] => 028643 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/028643
Aperture size control for etched vias and metal contacts Mar 8, 1993 Issued
Array ( [id] => 3052244 [patent_doc_number] => 05344793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-06 [patent_title] => 'Formation of silicided junctions in deep sub-micron MOSFETs by defect enhanced CoSi2 formation' [patent_app_type] => 1 [patent_app_number] => 8/026944 [patent_app_country] => US [patent_app_date] => 1993-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1474 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/344/05344793.pdf [firstpage_image] =>[orig_patent_app_number] => 026944 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/026944
Formation of silicided junctions in deep sub-micron MOSFETs by defect enhanced CoSi2 formation Mar 4, 1993 Issued
Array ( [id] => 3070210 [patent_doc_number] => 05336623 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-09 [patent_title] => 'Process for producing integrated solar cell' [patent_app_type] => 1 [patent_app_number] => 8/025128 [patent_app_country] => US [patent_app_date] => 1993-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1578 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/336/05336623.pdf [firstpage_image] =>[orig_patent_app_number] => 025128 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/025128
Process for producing integrated solar cell Mar 1, 1993 Issued
08/026114 METHOD FOR BURYING LOW RESISTANCE MATERIAL IN A CONTACT HOLE Mar 1, 1993 Abandoned
Array ( [id] => 3007485 [patent_doc_number] => 05275973 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Method for forming metallization in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/024150 [patent_app_country] => US [patent_app_date] => 1993-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/275/05275973.pdf [firstpage_image] =>[orig_patent_app_number] => 024150 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/024150
Method for forming metallization in an integrated circuit Feb 28, 1993 Issued
Array ( [id] => 3083512 [patent_doc_number] => 05279989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-18 [patent_title] => 'Method for forming miniature contacts of highly integrated semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/022666 [patent_app_country] => US [patent_app_date] => 1993-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1970 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 408 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/279/05279989.pdf [firstpage_image] =>[orig_patent_app_number] => 022666 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/022666
Method for forming miniature contacts of highly integrated semiconductor devices Feb 28, 1993 Issued
Array ( [id] => 3065347 [patent_doc_number] => 05336365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-09 [patent_title] => 'Polysilicon etching method' [patent_app_type] => 1 [patent_app_number] => 8/022634 [patent_app_country] => US [patent_app_date] => 1993-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3778 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/336/05336365.pdf [firstpage_image] =>[orig_patent_app_number] => 022634 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/022634
Polysilicon etching method Feb 24, 1993 Issued
Array ( [id] => 3446497 [patent_doc_number] => 05387556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-07 [patent_title] => 'Etching aluminum and its alloys using HC1, C1-containing etchant and N.sub. 2' [patent_app_type] => 1 [patent_app_number] => 8/021831 [patent_app_country] => US [patent_app_date] => 1993-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4000 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/387/05387556.pdf [firstpage_image] =>[orig_patent_app_number] => 021831 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/021831
Etching aluminum and its alloys using HC1, C1-containing etchant and N.sub. 2 Feb 23, 1993 Issued
Array ( [id] => 3029252 [patent_doc_number] => 05342799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-30 [patent_title] => 'Substrate slew circuit process' [patent_app_type] => 1 [patent_app_number] => 8/020486 [patent_app_country] => US [patent_app_date] => 1993-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 1852 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/342/05342799.pdf [firstpage_image] =>[orig_patent_app_number] => 020486 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/020486
Substrate slew circuit process Feb 21, 1993 Issued
Array ( [id] => 2975124 [patent_doc_number] => 05256595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-26 [patent_title] => 'Method of growing device quality InP onto an InP substrate using an organometallic precursor in a hot wall reactor' [patent_app_type] => 1 [patent_app_number] => 8/019508 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1674 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/256/05256595.pdf [firstpage_image] =>[orig_patent_app_number] => 019508 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019508
Method of growing device quality InP onto an InP substrate using an organometallic precursor in a hot wall reactor Feb 18, 1993 Issued
Array ( [id] => 2887630 [patent_doc_number] => 05238878 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-24 [patent_title] => 'Film forming method by spin coating in production of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/019056 [patent_app_country] => US [patent_app_date] => 1993-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2757 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/238/05238878.pdf [firstpage_image] =>[orig_patent_app_number] => 019056 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019056
Film forming method by spin coating in production of semiconductor device Feb 17, 1993 Issued
Array ( [id] => 3425371 [patent_doc_number] => 05416045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-16 [patent_title] => 'Method for chemical vapor depositing a titanium nitride layer on a semiconductor wafer and method of annealing tin films' [patent_app_type] => 1 [patent_app_number] => 8/019084 [patent_app_country] => US [patent_app_date] => 1993-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2839 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/416/05416045.pdf [firstpage_image] =>[orig_patent_app_number] => 019084 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019084
Method for chemical vapor depositing a titanium nitride layer on a semiconductor wafer and method of annealing tin films Feb 17, 1993 Issued
Array ( [id] => 3059794 [patent_doc_number] => 05294296 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-15 [patent_title] => 'Method for manufacturing a contact hole of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/016597 [patent_app_country] => US [patent_app_date] => 1993-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 1720 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/294/05294296.pdf [firstpage_image] =>[orig_patent_app_number] => 016597 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/016597
Method for manufacturing a contact hole of a semiconductor device Feb 10, 1993 Issued
08/014920 METHOD OF FORMING A LOW-RESISTANCE CONTACT ON A COMPOUND SEMICONDUCTOR Feb 7, 1993 Abandoned
Array ( [id] => 3043794 [patent_doc_number] => 05334545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Process for forming self-aligning cobalt silicide T-gates of silicon MOS devices' [patent_app_type] => 1 [patent_app_number] => 8/011632 [patent_app_country] => US [patent_app_date] => 1993-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1186 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/334/05334545.pdf [firstpage_image] =>[orig_patent_app_number] => 011632 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/011632
Process for forming self-aligning cobalt silicide T-gates of silicon MOS devices Jan 31, 1993 Issued
Array ( [id] => 3017791 [patent_doc_number] => 05288660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-22 [patent_title] => 'Method for forming self-aligned t-shaped transistor electrode' [patent_app_type] => 1 [patent_app_number] => 8/011998 [patent_app_country] => US [patent_app_date] => 1993-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 4303 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/288/05288660.pdf [firstpage_image] =>[orig_patent_app_number] => 011998 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/011998
Method for forming self-aligned t-shaped transistor electrode Jan 31, 1993 Issued
Array ( [id] => 3091115 [patent_doc_number] => 05312775 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Method of manufacturing semiconductor device having multilayer interconnection structure' [patent_app_type] => 1 [patent_app_number] => 8/009180 [patent_app_country] => US [patent_app_date] => 1993-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 6504 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/312/05312775.pdf [firstpage_image] =>[orig_patent_app_number] => 009180 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/009180
Method of manufacturing semiconductor device having multilayer interconnection structure Jan 25, 1993 Issued
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