Search

Barbara J Bullock

Examiner (ID: 9881)

Most Active Art Unit
2901
Art Unit(s)
2900, 2912, 2901, 2902
Total Applications
4468
Issued Applications
4372
Pending Applications
0
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7523431 [patent_doc_number] => 08026590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Die package and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/581131 [patent_app_country] => US [patent_app_date] => 2009-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 5381 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/026/08026590.pdf [firstpage_image] =>[orig_patent_app_number] => 12581131 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/581131
Die package and method of manufacturing the same Oct 16, 2009 Issued
Array ( [id] => 8738741 [patent_doc_number] => 08410511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Methods for high temperature processing of epitaxial chips' [patent_app_type] => utility [patent_app_number] => 12/589056 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7531 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12589056 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/589056
Methods for high temperature processing of epitaxial chips Oct 15, 2009 Issued
Array ( [id] => 6311179 [patent_doc_number] => 20100193871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Stacked load-less static random access memory device' [patent_app_type] => utility [patent_app_number] => 12/589101 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5699 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20100193871.pdf [firstpage_image] =>[orig_patent_app_number] => 12589101 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/589101
Stacked load-less static random access memory device Oct 15, 2009 Issued
Array ( [id] => 6036531 [patent_doc_number] => 20110089580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING HIGH PERFORMANCE ENCAPSULATION RESINS' [patent_app_type] => utility [patent_app_number] => 12/580555 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12361 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089580.pdf [firstpage_image] =>[orig_patent_app_number] => 12580555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/580555
Semiconductor device comprising high performance encapsulation resins Oct 15, 2009 Issued
Array ( [id] => 6036497 [patent_doc_number] => 20110089546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'MULTIPLE LEADFRAME PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/581065 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9757 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089546.pdf [firstpage_image] =>[orig_patent_app_number] => 12581065 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/581065
Multiple leadframe package Oct 15, 2009 Issued
Array ( [id] => 6036480 [patent_doc_number] => 20110089529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'Open Cavity Leadless Surface Mountable Package for High Power RF Applications' [patent_app_type] => utility [patent_app_number] => 12/580304 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4772 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089529.pdf [firstpage_image] =>[orig_patent_app_number] => 12580304 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/580304
Open cavity leadless surface mountable package for high power RF applications Oct 15, 2009 Issued
Array ( [id] => 9530550 [patent_doc_number] => 08754425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Electrically pixelated luminescent device' [patent_app_type] => utility [patent_app_number] => 13/062113 [patent_app_country] => US [patent_app_date] => 2009-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 12144 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13062113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/062113
Electrically pixelated luminescent device Sep 2, 2009 Issued
Array ( [id] => 6221055 [patent_doc_number] => 20100055926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/551816 [patent_app_country] => US [patent_app_date] => 2009-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8848 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20100055926.pdf [firstpage_image] =>[orig_patent_app_number] => 12551816 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/551816
Manufacturing method of semiconductor device Aug 31, 2009 Issued
Array ( [id] => 9455041 [patent_doc_number] => 08716047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Method for producing transparent conductive layer comprising TIO2 and method for producing semiconductor light-emitting element utilizing said method for producing transparent conductive layer' [patent_app_type] => utility [patent_app_number] => 12/585015 [patent_app_country] => US [patent_app_date] => 2009-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3508 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12585015 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585015
Method for producing transparent conductive layer comprising TIO2 and method for producing semiconductor light-emitting element utilizing said method for producing transparent conductive layer Aug 30, 2009 Issued
Array ( [id] => 6220841 [patent_doc_number] => 20100055823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Methods of manufacturing CMOS image sensors' [patent_app_type] => utility [patent_app_number] => 12/461903 [patent_app_country] => US [patent_app_date] => 2009-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5449 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20100055823.pdf [firstpage_image] =>[orig_patent_app_number] => 12461903 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/461903
Methods of manufacturing CMOS image sensors Aug 26, 2009 Issued
Array ( [id] => 6484805 [patent_doc_number] => 20100258920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'MANUFACTURING METHOD OF ADVANCED QUAD FLAT NON-LEADED PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/547787 [patent_app_country] => US [patent_app_date] => 2009-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3289 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20100258920.pdf [firstpage_image] =>[orig_patent_app_number] => 12547787 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/547787
Manufacturing method of advanced quad flat non-leaded package Aug 25, 2009 Issued
Array ( [id] => 6304831 [patent_doc_number] => 20100068836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'METHOD OF MEASURING RESISTIVITY OF SIDEWALL OF CONTACT HOLE' [patent_app_type] => utility [patent_app_number] => 12/546745 [patent_app_country] => US [patent_app_date] => 2009-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7818 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20100068836.pdf [firstpage_image] =>[orig_patent_app_number] => 12546745 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/546745
Method of measuring resistivity of sidewall of contact hole Aug 24, 2009 Issued
Array ( [id] => 7800950 [patent_doc_number] => 08129220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Method and system for bonding electrical devices using an electrically conductive adhesive' [patent_app_type] => utility [patent_app_number] => 12/546207 [patent_app_country] => US [patent_app_date] => 2009-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6913 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/129/08129220.pdf [firstpage_image] =>[orig_patent_app_number] => 12546207 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/546207
Method and system for bonding electrical devices using an electrically conductive adhesive Aug 23, 2009 Issued
Array ( [id] => 6067771 [patent_doc_number] => 20110042757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'INTEGRATED CIRCUIT SYSTEM WITH BAND TO BAND TUNNELING AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/544747 [patent_app_country] => US [patent_app_date] => 2009-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20110042757.pdf [firstpage_image] =>[orig_patent_app_number] => 12544747 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/544747
Integrated circuit system with band to band tunneling and method of manufacture thereof Aug 19, 2009 Issued
Array ( [id] => 8846119 [patent_doc_number] => 08455298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Method for forming self-aligned phase-change semiconductor diode memory' [patent_app_type] => utility [patent_app_number] => 12/543086 [patent_app_country] => US [patent_app_date] => 2009-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4791 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12543086 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/543086
Method for forming self-aligned phase-change semiconductor diode memory Aug 17, 2009 Issued
Array ( [id] => 6070825 [patent_doc_number] => 20110045676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'REMOTE PLASMA SOURCE SEASONING' [patent_app_type] => utility [patent_app_number] => 12/543245 [patent_app_country] => US [patent_app_date] => 2009-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5764 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20110045676.pdf [firstpage_image] =>[orig_patent_app_number] => 12543245 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/543245
Remote plasma source seasoning Aug 17, 2009 Issued
Array ( [id] => 6501170 [patent_doc_number] => 20100210081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'STRESS MEMORIZATION DIELECTRIC OPTIMIZED FOR NMOS AND PMOS' [patent_app_type] => utility [patent_app_number] => 12/541335 [patent_app_country] => US [patent_app_date] => 2009-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2340 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20100210081.pdf [firstpage_image] =>[orig_patent_app_number] => 12541335 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/541335
Stress memorization dielectric optimized for NMOS and PMOS Aug 13, 2009 Issued
Array ( [id] => 4477085 [patent_doc_number] => 07906434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Manufacturing method of semiconductor devices' [patent_app_type] => utility [patent_app_number] => 12/539937 [patent_app_country] => US [patent_app_date] => 2009-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 3569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/906/07906434.pdf [firstpage_image] =>[orig_patent_app_number] => 12539937 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/539937
Manufacturing method of semiconductor devices Aug 11, 2009 Issued
Array ( [id] => 4476802 [patent_doc_number] => 07906351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Method for metal gate quality characterization' [patent_app_type] => utility [patent_app_number] => 12/537296 [patent_app_country] => US [patent_app_date] => 2009-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4083 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/906/07906351.pdf [firstpage_image] =>[orig_patent_app_number] => 12537296 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/537296
Method for metal gate quality characterization Aug 6, 2009 Issued
Array ( [id] => 4483450 [patent_doc_number] => 07901971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Method for manufacturing a sensor device with a stress relief layer' [patent_app_type] => utility [patent_app_number] => 12/462528 [patent_app_country] => US [patent_app_date] => 2009-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/901/07901971.pdf [firstpage_image] =>[orig_patent_app_number] => 12462528 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/462528
Method for manufacturing a sensor device with a stress relief layer Aug 4, 2009 Issued
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