Search

Barry T. Drennan

Supervisory Patent Examiner (ID: 939, Phone: (571)270-7262 , Office: P/2618 )

Most Active Art Unit
2624
Art Unit(s)
2665, 2624, 2618, PPDA, 2616
Total Applications
288
Issued Applications
207
Pending Applications
0
Abandoned Applications
82

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7352800 [patent_doc_number] => 20040048424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Method of forming an N channel and P channel FINFET device on the same semiconductor substrate' [patent_app_type] => new [patent_app_number] => 10/235253 [patent_app_country] => US [patent_app_date] => 2002-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2732 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20040048424.pdf [firstpage_image] =>[orig_patent_app_number] => 10235253 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/235253
Method of forming an N channel and P channel FINFET device on the same semiconductor substrate Sep 4, 2002 Issued
Array ( [id] => 6716022 [patent_doc_number] => 20030027370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Process for fabricating a microelectromechanical optical component' [patent_app_type] => new [patent_app_number] => 10/205724 [patent_app_country] => US [patent_app_date] => 2002-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5686 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20030027370.pdf [firstpage_image] =>[orig_patent_app_number] => 10205724 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/205724
Process for fabricating a microelectromechanical optical component Jul 25, 2002 Issued
Array ( [id] => 1266520 [patent_doc_number] => 06661070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Micromechanical and microoptomechanical structures with single crystal silicon exposure step' [patent_app_type] => B2 [patent_app_number] => 10/193804 [patent_app_country] => US [patent_app_date] => 2002-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 6481 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661070.pdf [firstpage_image] =>[orig_patent_app_number] => 10193804 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/193804
Micromechanical and microoptomechanical structures with single crystal silicon exposure step Jul 10, 2002 Issued
Array ( [id] => 5900930 [patent_doc_number] => 20020139992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Silicon carbide semiconductor device and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 10/107174 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9733 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20020139992.pdf [firstpage_image] =>[orig_patent_app_number] => 10107174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/107174
Silicon carbide semiconductor device and method of fabricating the same Mar 27, 2002 Issued
Array ( [id] => 6384840 [patent_doc_number] => 20020179941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/067214 [patent_app_country] => US [patent_app_date] => 2002-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6793 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20020179941.pdf [firstpage_image] =>[orig_patent_app_number] => 10067214 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/067214
Semiconductor device and method of manufacturing the same Feb 6, 2002 Abandoned
Array ( [id] => 6092103 [patent_doc_number] => 20020050646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-02 [patent_title] => 'Semiconductor device having dummy interconnection and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/006407 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9669 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20020050646.pdf [firstpage_image] =>[orig_patent_app_number] => 10006407 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/006407
Semiconductor device having dummy interconnection and method for manufacturing the same Nov 29, 2001 Issued
Array ( [id] => 6539778 [patent_doc_number] => 20020137307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Method for forming isolation layer of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/001314 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2352 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20020137307.pdf [firstpage_image] =>[orig_patent_app_number] => 10001314 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/001314
Method for forming isolation layer of semiconductor device Nov 13, 2001 Abandoned
Array ( [id] => 6205450 [patent_doc_number] => 20020070457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Metal contact structure in semiconductor device and method for forming the same' [patent_app_type] => new [patent_app_number] => 10/010604 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4118 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070457.pdf [firstpage_image] =>[orig_patent_app_number] => 10010604 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010604
Metal contact structure in semiconductor device and method for forming the same Nov 7, 2001 Abandoned
09/893780 Semiconductor device with plate heat sink free from cracks due to thermal stress and process for assembling it with package Jun 28, 2001 Abandoned
Array ( [id] => 6998440 [patent_doc_number] => 20010052618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-20 [patent_title] => 'Semiconductor device having a plurality of gate insulating films of different thicknesses, and method of manufacturing such semiconductor device' [patent_app_type] => new [patent_app_number] => 09/883373 [patent_app_country] => US [patent_app_date] => 2001-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7866 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20010052618.pdf [firstpage_image] =>[orig_patent_app_number] => 09883373 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/883373
Semiconductor device having a plurality of gate insulating films of different thicknesses, and method of manufacturing such semiconductor device Jun 18, 2001 Abandoned
Array ( [id] => 6306538 [patent_doc_number] => 20020094597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'Quantum dot infrared photodetector and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 09/846173 [patent_app_country] => US [patent_app_date] => 2001-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2054 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20020094597.pdf [firstpage_image] =>[orig_patent_app_number] => 09846173 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/846173
Quantum dot infrared photodetector and method for fabricating the same Apr 29, 2001 Abandoned
Array ( [id] => 1158682 [patent_doc_number] => 06765289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Reinforcement material for silicon wafer and process for producing IC chip using said material' [patent_app_type] => B2 [patent_app_number] => 09/840864 [patent_app_country] => US [patent_app_date] => 2001-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 4212 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765289.pdf [firstpage_image] =>[orig_patent_app_number] => 09840864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840864
Reinforcement material for silicon wafer and process for producing IC chip using said material Apr 24, 2001 Issued
Array ( [id] => 7093175 [patent_doc_number] => 20010034102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Method for fabricating nonvolatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/834643 [patent_app_country] => US [patent_app_date] => 2001-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3322 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20010034102.pdf [firstpage_image] =>[orig_patent_app_number] => 09834643 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/834643
Method for fabricating nonvolatile semiconductor memory device Apr 15, 2001 Issued
Array ( [id] => 6880236 [patent_doc_number] => 20010031523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Method of manufacturing semiconductor device having gate insulating films in different thickness' [patent_app_type] => new [patent_app_number] => 09/828943 [patent_app_country] => US [patent_app_date] => 2001-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2818 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20010031523.pdf [firstpage_image] =>[orig_patent_app_number] => 09828943 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/828943
Method of manufacturing semiconductor device having gate insulating films in different thickness Apr 9, 2001 Abandoned
Array ( [id] => 6237474 [patent_doc_number] => 20020043681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Hole-type storage cell structure and method for making the structure' [patent_app_type] => new [patent_app_number] => 09/828824 [patent_app_country] => US [patent_app_date] => 2001-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3157 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20020043681.pdf [firstpage_image] =>[orig_patent_app_number] => 09828824 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/828824
Hole-type storage cell structure and method for making the structure Apr 9, 2001 Abandoned
Array ( [id] => 6158062 [patent_doc_number] => 20020146890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Method of fabricating gate oxide' [patent_app_type] => new [patent_app_number] => 09/828544 [patent_app_country] => US [patent_app_date] => 2001-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1723 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20020146890.pdf [firstpage_image] =>[orig_patent_app_number] => 09828544 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/828544
Method of fabricating gate oxide Apr 5, 2001 Issued
Array ( [id] => 7631414 [patent_doc_number] => 06635518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'SOI FET and method for creating FET body connections with high-quality matching characteristics and no area penalty for partially depleted SOI technologies' [patent_app_type] => B2 [patent_app_number] => 09/825704 [patent_app_country] => US [patent_app_date] => 2001-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2234 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635518.pdf [firstpage_image] =>[orig_patent_app_number] => 09825704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/825704
SOI FET and method for creating FET body connections with high-quality matching characteristics and no area penalty for partially depleted SOI technologies Apr 3, 2001 Issued
Array ( [id] => 7028236 [patent_doc_number] => 20010014526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'Semi-sacrificial diamond for air dielectric formation' [patent_app_type] => new [patent_app_number] => 09/825653 [patent_app_country] => US [patent_app_date] => 2001-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3173 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20010014526.pdf [firstpage_image] =>[orig_patent_app_number] => 09825653 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/825653
Semi-sacrificial diamond for air dielectric formation Apr 3, 2001 Issued
Array ( [id] => 1490232 [patent_doc_number] => 06417075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Method for producing thin substrate layers' [patent_app_type] => B1 [patent_app_number] => 09/720154 [patent_app_country] => US [patent_app_date] => 2001-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4418 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417075.pdf [firstpage_image] =>[orig_patent_app_number] => 09720154 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/720154
Method for producing thin substrate layers Mar 21, 2001 Issued
Array ( [id] => 1375452 [patent_doc_number] => 06558994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-06 [patent_title] => 'Dual silicon-on-insulator device wafer die' [patent_app_type] => B2 [patent_app_number] => 09/841564 [patent_app_country] => US [patent_app_date] => 2001-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 1677 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/558/06558994.pdf [firstpage_image] =>[orig_patent_app_number] => 09841564 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/841564
Dual silicon-on-insulator device wafer die Feb 28, 2001 Issued
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