Belur V. Keshavan

Array ( [id] => 1462691 [patent_doc_number] => 06350707 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-26 [patent_title] => 'Method of fabricating capacitor dielectric' [patent_app_type] => B1 [patent_app_number] => 09/389999 [patent_app_country] => US [patent_app_date] => 1999-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1359 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/350/06350707.pdf [firstpage_image] =>[orig_patent_app_number] => 09389999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1433330 [patent_doc_number] => 06340620 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Method of fabricating a capacitor' [patent_app_type] => B1 [patent_app_number] => 09/386349 [patent_app_country] => US [patent_app_date] => 1999-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2100 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/340/06340620.pdf [firstpage_image] =>[orig_patent_app_number] => 09386349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4408646 [patent_doc_number] => 06300228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Multiple precipitation doping process' [patent_app_type] => 1 [patent_app_number] => 9/386089 [patent_app_country] => US [patent_app_date] => 1999-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 6632 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300228.pdf [firstpage_image] =>[orig_patent_app_number] => 386089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4408589 [patent_doc_number] => 06228706 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Vertical DRAM cell with TFT over trench capacitor' [patent_app_type] => 1 [patent_app_number] => 9/384298 [patent_app_country] => US [patent_app_date] => 1999-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2752 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/228/06228706.pdf [firstpage_image] =>[orig_patent_app_number] => 384298 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1580203 [patent_doc_number] => 06448597 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'DRAM having a stacked capacitor and a method for fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/382638 [patent_app_country] => US [patent_app_date] => 1999-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 5679 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448597.pdf [firstpage_image] =>[orig_patent_app_number] => 09382638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4368264 [patent_doc_number] => 06287886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Method of forming a CMOS image sensor' [patent_app_type] => 1 [patent_app_number] => 9/378698 [patent_app_country] => US [patent_app_date] => 1999-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2203 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/287/06287886.pdf [firstpage_image] =>[orig_patent_app_number] => 378698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1440987 [patent_doc_number] => 06335235 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Simplified method of patterning field dielectric regions in a semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/376055 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2981 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335235.pdf [firstpage_image] =>[orig_patent_app_number] => 09376055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1458745 [patent_doc_number] => 06426256 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Method for fabricating an embedded DRAM with self-aligned borderless contacts' [patent_app_type] => B1 [patent_app_number] => 09/375518 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1653 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426256.pdf [firstpage_image] =>[orig_patent_app_number] => 09375518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4381328 [patent_doc_number] => 06294436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Method for fabrication of enlarged stacked capacitors using isotropic etching' [patent_app_type] => 1 [patent_app_number] => 9/374538 [patent_app_country] => US [patent_app_date] => 1999-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4079 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294436.pdf [firstpage_image] =>[orig_patent_app_number] => 374538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4194631 [patent_doc_number] => 06153890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Memory cell incorporating a chalcogenide element' [patent_app_type] => 1 [patent_app_number] => 9/374378 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 5198 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153890.pdf [firstpage_image] =>[orig_patent_app_number] => 374378 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4152159 [patent_doc_number] => 06124177 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Method for making deep sub-micron mosfet structures having improved electrical characteristics' [patent_app_type] => 1 [patent_app_number] => 9/373635 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3661 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124177.pdf [firstpage_image] =>[orig_patent_app_number] => 373635 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4222201 [patent_doc_number] => 06111284 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Ferroelectric thin-film device' [patent_app_type] => 1 [patent_app_number] => 9/372848 [patent_app_country] => US [patent_app_date] => 1999-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5160 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111284.pdf [firstpage_image] =>[orig_patent_app_number] => 372848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4417327 [patent_doc_number] => 06194291 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Microelectronic assemblies with multiple leads' [patent_app_type] => 1 [patent_app_number] => 9/372021 [patent_app_country] => US [patent_app_date] => 1999-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 30 [patent_no_of_words] => 13074 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194291.pdf [firstpage_image] =>[orig_patent_app_number] => 372021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4354496 [patent_doc_number] => 06200855 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Semiconductor memory device, and method for fabricating thereof' [patent_app_type] => 1 [patent_app_number] => 9/369969 [patent_app_country] => US [patent_app_date] => 1999-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3837 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/200/06200855.pdf [firstpage_image] =>[orig_patent_app_number] => 369969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4099929 [patent_doc_number] => 06066535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/368799 [patent_app_country] => US [patent_app_date] => 1999-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5099 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066535.pdf [firstpage_image] =>[orig_patent_app_number] => 368799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4357574 [patent_doc_number] => 06174808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Intermetal dielectric using HDP-CVD oxide and SACVD O3-TEOS' [patent_app_type] => 1 [patent_app_number] => 9/366740 [patent_app_country] => US [patent_app_date] => 1999-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 6084 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/174/06174808.pdf [firstpage_image] =>[orig_patent_app_number] => 366740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4359032 [patent_doc_number] => 06169010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Method for making integrated circuit capacitor including anchored plug' [patent_app_type] => 1 [patent_app_number] => 9/364208 [patent_app_country] => US [patent_app_date] => 1999-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3678 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169010.pdf [firstpage_image] =>[orig_patent_app_number] => 364208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4196397 [patent_doc_number] => 06130462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Vertical poly load device in 4T SRAM technology' [patent_app_type] => 1 [patent_app_number] => 9/360809 [patent_app_country] => US [patent_app_date] => 1999-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 3303 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 447 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130462.pdf [firstpage_image] =>[orig_patent_app_number] => 360809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4139586 [patent_doc_number] => 06121649 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Semiconductor device with ferroelectric capacitors' [patent_app_type] => 1 [patent_app_number] => 9/353639 [patent_app_country] => US [patent_app_date] => 1999-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 32 [patent_no_of_words] => 6275 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121649.pdf [firstpage_image] =>[orig_patent_app_number] => 353639 [rel_patent_id] =>[rel_patent_doc_number] =>)