Search

Belur V. Keshavan

Examiner (ID: 2641)

Most Active Art Unit
2825
Art Unit(s)
2825, 2823
Total Applications
284
Issued Applications
267
Pending Applications
6
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4247251 [patent_doc_number] => 06221742 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method for fabricating polysilicon film for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/146260 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 4946 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221742.pdf [firstpage_image] =>[orig_patent_app_number] => 146260 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146260
Method for fabricating polysilicon film for semiconductor device Sep 2, 1998 Issued
Array ( [id] => 4195042 [patent_doc_number] => 06153918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Semiconductor device with improved planarity and reduced parasitic capacitance' [patent_app_type] => 1 [patent_app_number] => 9/138017 [patent_app_country] => US [patent_app_date] => 1998-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4753 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153918.pdf [firstpage_image] =>[orig_patent_app_number] => 138017 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/138017
Semiconductor device with improved planarity and reduced parasitic capacitance Aug 20, 1998 Issued
Array ( [id] => 4358831 [patent_doc_number] => 06168996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/137508 [patent_app_country] => US [patent_app_date] => 1998-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 9237 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/168/06168996.pdf [firstpage_image] =>[orig_patent_app_number] => 137508 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/137508
Method of fabricating semiconductor device Aug 19, 1998 Issued
Array ( [id] => 4235879 [patent_doc_number] => 06143636 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'High density flash memory' [patent_app_type] => 1 [patent_app_number] => 9/137328 [patent_app_country] => US [patent_app_date] => 1998-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6798 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143636.pdf [firstpage_image] =>[orig_patent_app_number] => 137328 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/137328
High density flash memory Aug 19, 1998 Issued
Array ( [id] => 4344697 [patent_doc_number] => 06284646 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Methods of forming smooth conductive layers for integrated circuit devices' [patent_app_type] => 1 [patent_app_number] => 9/136471 [patent_app_country] => US [patent_app_date] => 1998-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3981 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/284/06284646.pdf [firstpage_image] =>[orig_patent_app_number] => 136471 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/136471
Methods of forming smooth conductive layers for integrated circuit devices Aug 18, 1998 Issued
Array ( [id] => 4246110 [patent_doc_number] => 06136672 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Process for device fabrication using a high-energy boron implant' [patent_app_type] => 1 [patent_app_number] => 9/131860 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3095 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136672.pdf [firstpage_image] =>[orig_patent_app_number] => 131860 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131860
Process for device fabrication using a high-energy boron implant Aug 9, 1998 Issued
Array ( [id] => 4246851 [patent_doc_number] => 06221715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method of making polysilicon self-aligned to field isolation oxide' [patent_app_type] => 1 [patent_app_number] => 9/123500 [patent_app_country] => US [patent_app_date] => 1998-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 4704 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221715.pdf [firstpage_image] =>[orig_patent_app_number] => 123500 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/123500
Method of making polysilicon self-aligned to field isolation oxide Jul 27, 1998 Issued
Array ( [id] => 4182063 [patent_doc_number] => 06150208 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'DRAM capacitors made from silicon-germanium and electrode-limited conduction dielectric films' [patent_app_type] => 1 [patent_app_number] => 9/076333 [patent_app_country] => US [patent_app_date] => 1998-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1804 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150208.pdf [firstpage_image] =>[orig_patent_app_number] => 076333 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/076333
DRAM capacitors made from silicon-germanium and electrode-limited conduction dielectric films May 10, 1998 Issued
Array ( [id] => 4235036 [patent_doc_number] => 06165834 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Method of forming capacitors, method of processing dielectric layers, method of forming a DRAM cell' [patent_app_type] => 1 [patent_app_number] => 9/074638 [patent_app_country] => US [patent_app_date] => 1998-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2657 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/165/06165834.pdf [firstpage_image] =>[orig_patent_app_number] => 074638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074638
Method of forming capacitors, method of processing dielectric layers, method of forming a DRAM cell May 6, 1998 Issued
Array ( [id] => 4094663 [patent_doc_number] => 06096606 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Method of making a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/072256 [patent_app_country] => US [patent_app_date] => 1998-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5781 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096606.pdf [firstpage_image] =>[orig_patent_app_number] => 072256 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/072256
Method of making a semiconductor device May 3, 1998 Issued
Array ( [id] => 4196631 [patent_doc_number] => 06130478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Polymer stud grid array for microwave circuit arrangements' [patent_app_type] => 1 [patent_app_number] => 9/051777 [patent_app_country] => US [patent_app_date] => 1998-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2059 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130478.pdf [firstpage_image] =>[orig_patent_app_number] => 051777 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/051777
Polymer stud grid array for microwave circuit arrangements Apr 17, 1998 Issued
Array ( [id] => 1223684 [patent_doc_number] => 06699745 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'Capacitor and memory structure and method' [patent_app_type] => B1 [patent_app_number] => 09/049591 [patent_app_country] => US [patent_app_date] => 1998-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 2473 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/699/06699745.pdf [firstpage_image] =>[orig_patent_app_number] => 09049591 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/049591
Capacitor and memory structure and method Mar 26, 1998 Issued
Array ( [id] => 4162654 [patent_doc_number] => 06157057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Flash memory cell' [patent_app_type] => 1 [patent_app_number] => 9/024782 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 1994 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157057.pdf [firstpage_image] =>[orig_patent_app_number] => 024782 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/024782
Flash memory cell Feb 16, 1998 Issued
Array ( [id] => 4094417 [patent_doc_number] => 06096592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Methods of forming integrated circuit capacitors having plasma treated regions therein' [patent_app_type] => 1 [patent_app_number] => 9/022311 [patent_app_country] => US [patent_app_date] => 1998-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4312 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096592.pdf [firstpage_image] =>[orig_patent_app_number] => 022311 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/022311
Methods of forming integrated circuit capacitors having plasma treated regions therein Feb 10, 1998 Issued
Array ( [id] => 4290568 [patent_doc_number] => 06235650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Method for improved semiconductor device reliability' [patent_app_type] => 1 [patent_app_number] => 8/999204 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1697 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/235/06235650.pdf [firstpage_image] =>[orig_patent_app_number] => 999204 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/999204
Method for improved semiconductor device reliability Dec 28, 1997 Issued
Array ( [id] => 4301606 [patent_doc_number] => 06251713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Method of making an SRAM storage cell with N channel thin film transistor load devices' [patent_app_type] => 1 [patent_app_number] => 8/979580 [patent_app_country] => US [patent_app_date] => 1997-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1944 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/251/06251713.pdf [firstpage_image] =>[orig_patent_app_number] => 979580 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/979580
Method of making an SRAM storage cell with N channel thin film transistor load devices Nov 25, 1997 Issued
Array ( [id] => 4101523 [patent_doc_number] => 06100134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/841783 [patent_app_country] => US [patent_app_date] => 1997-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 98 [patent_figures_cnt] => 122 [patent_no_of_words] => 12664 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100134.pdf [firstpage_image] =>[orig_patent_app_number] => 841783 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/841783
Method of fabricating semiconductor device May 4, 1997 Issued
Array ( [id] => 4381965 [patent_doc_number] => 06294479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Film forming method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/384597 [patent_app_country] => US [patent_app_date] => 1995-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7288 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294479.pdf [firstpage_image] =>[orig_patent_app_number] => 384597 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/384597
Film forming method and apparatus Feb 2, 1995 Issued
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