Search

Belur V. Keshavan

Examiner (ID: 12700)

Most Active Art Unit
2825
Art Unit(s)
2825, 2823
Total Applications
284
Issued Applications
267
Pending Applications
6
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13499299 [patent_doc_number] => 20180301192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => Content Addressable Memory Device Having Electrically Floating Body Transistor [patent_app_type] => utility [patent_app_number] => 16/013646 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29275 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013646
Content addressable memory device having electrically floating body transistor Jun 19, 2018 Issued
Array ( [id] => 13950309 [patent_doc_number] => 10210933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => System and method for adjusting EEPROM write cycle duration according to supply voltage variation [patent_app_type] => utility [patent_app_number] => 16/010268 [patent_app_country] => US [patent_app_date] => 2018-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16010268 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/010268
System and method for adjusting EEPROM write cycle duration according to supply voltage variation Jun 14, 2018 Issued
Array ( [id] => 15045115 [patent_doc_number] => 20190333562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => SENSING A MEMORY CELL [patent_app_type] => utility [patent_app_number] => 15/962938 [patent_app_country] => US [patent_app_date] => 2018-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15962938 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/962938
Sensing a memory cell Apr 24, 2018 Issued
Array ( [id] => 15029923 [patent_doc_number] => 20190325966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => NON-VOLATILE MEMORY DEVICES AND SYSTEMS WITH VOLATILE MEMORY FEATURES AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/959868 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959868 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959868
Non-volatile memory devices and systems with volatile memory features and methods for operating the same Apr 22, 2018 Issued
Array ( [id] => 15029917 [patent_doc_number] => 20190325963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => TERNARY MEMORY CELL AND TERNARY MEMORY CELL ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 15/959688 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14500 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959688 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959688
Ternary memory cell and ternary memory cell arrangement Apr 22, 2018 Issued
Array ( [id] => 16536279 [patent_doc_number] => 10878892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Integrated circuit using discharging circuitries for bit lines [patent_app_type] => utility [patent_app_number] => 15/960482 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960482 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/960482
Integrated circuit using discharging circuitries for bit lines Apr 22, 2018 Issued
Array ( [id] => 14475125 [patent_doc_number] => 20190189209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => NON-CONTACT ELECTRON BEAM PROBING TECHNIQUES AND RELATED STRUCTURES [patent_app_type] => utility [patent_app_number] => 15/918662 [patent_app_country] => US [patent_app_date] => 2018-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15918662 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/918662
Non-contact electron beam probing techniques and related structures Mar 11, 2018 Issued
Array ( [id] => 16193911 [patent_doc_number] => 20200234760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/489912 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16489912 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/489912
Semiconductor device Feb 27, 2018 Issued
Array ( [id] => 12800023 [patent_doc_number] => 20180158510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => SRAM CELL FOR INTERLEAVED WORDLINE SCHEME [patent_app_type] => utility [patent_app_number] => 15/888517 [patent_app_country] => US [patent_app_date] => 2018-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15888517 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/888517
SRAM cell for interleaved wordline scheme Feb 4, 2018 Issued
Array ( [id] => 16201735 [patent_doc_number] => 10726910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Distributed sinking circuit control for memory device [patent_app_type] => utility [patent_app_number] => 15/874156 [patent_app_country] => US [patent_app_date] => 2018-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 10649 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874156 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874156
Distributed sinking circuit control for memory device Jan 17, 2018 Issued
Array ( [id] => 14587261 [patent_doc_number] => 20190221239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => Bitcell Wordline Strapping Circuitry [patent_app_type] => utility [patent_app_number] => 15/874444 [patent_app_country] => US [patent_app_date] => 2018-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874444 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874444
Bitcell wordline strapping circuitry Jan 17, 2018 Issued
Array ( [id] => 16067243 [patent_doc_number] => 10692581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Circuits for bleeding supply voltage from a device in a power down state [patent_app_type] => utility [patent_app_number] => 15/873812 [patent_app_country] => US [patent_app_date] => 2018-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4244 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15873812 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/873812
Circuits for bleeding supply voltage from a device in a power down state Jan 16, 2018 Issued
Array ( [id] => 15427385 [patent_doc_number] => 10546627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Semiconductor device and method of driving the same [patent_app_type] => utility [patent_app_number] => 15/873304 [patent_app_country] => US [patent_app_date] => 2018-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8157 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15873304 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/873304
Semiconductor device and method of driving the same Jan 16, 2018 Issued
Array ( [id] => 12716134 [patent_doc_number] => 20180130544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/866094 [patent_app_country] => US [patent_app_date] => 2018-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15866094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/866094
Semiconductor device and operating method thereof Jan 8, 2018 Issued
Array ( [id] => 15199829 [patent_doc_number] => 10497415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Dual gate memory devices [patent_app_type] => utility [patent_app_number] => 15/865144 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 7593 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15865144 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/865144
Dual gate memory devices Jan 7, 2018 Issued
Array ( [id] => 14508947 [patent_doc_number] => 20190198128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => TEST SYSTEM AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/864374 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864374 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864374
Test system and method of operating the same Jan 7, 2018 Issued
Array ( [id] => 16845745 [patent_doc_number] => 11017839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => DRAM, memory controller and associated training method [patent_app_type] => utility [patent_app_number] => 15/862884 [patent_app_country] => US [patent_app_date] => 2018-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6529 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15862884 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/862884
DRAM, memory controller and associated training method Jan 4, 2018 Issued
Array ( [id] => 14572985 [patent_doc_number] => 20190214100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => FAST DETECTION OF DEFECTIVE MEMORY BLOCK TO PREVENT NEIGHBOR PLANE DISTURB [patent_app_type] => utility [patent_app_number] => 15/863404 [patent_app_country] => US [patent_app_date] => 2018-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15863404 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/863404
Fast detection of defective memory block to prevent neighbor plane disturb Jan 4, 2018 Issued
Array ( [id] => 13613119 [patent_doc_number] => 20180358109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/850152 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7463 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15850152 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/850152
Memory device, memory system, and operating method of memory device Dec 20, 2017 Issued
Array ( [id] => 14475181 [patent_doc_number] => 20190189237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => NON-CONTACT MEASUREMENT OF MEMORY CELL THRESHOLD VOLTAGE [patent_app_type] => utility [patent_app_number] => 15/849262 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15849262 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/849262
Non-contact measurement of memory cell threshold voltage Dec 19, 2017 Issued
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