Search

Belur V. Keshavan

Examiner (ID: 18924)

Most Active Art Unit
2825
Art Unit(s)
2823, 2825
Total Applications
284
Issued Applications
267
Pending Applications
6
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1112861 [patent_doc_number] => 06803259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-12 [patent_title] => 'Silicon controlled rectifier for sige process, manufacturing method thereof and integrated circuit including the same' [patent_app_type] => B2 [patent_app_number] => 10/404620 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3290 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/803/06803259.pdf [firstpage_image] =>[orig_patent_app_number] => 10404620 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/404620
Silicon controlled rectifier for sige process, manufacturing method thereof and integrated circuit including the same Mar 30, 2003 Issued
Array ( [id] => 6829959 [patent_doc_number] => 20030181017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Capacitance element and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/391617 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7894 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20030181017.pdf [firstpage_image] =>[orig_patent_app_number] => 10391617 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/391617
Capacitance element and method of manufacturing the same Mar 19, 2003 Issued
Array ( [id] => 1089116 [patent_doc_number] => 06828198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process' [patent_app_type] => B2 [patent_app_number] => 10/392120 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 1849 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828198.pdf [firstpage_image] =>[orig_patent_app_number] => 10392120 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/392120
System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process Mar 18, 2003 Issued
Array ( [id] => 7280925 [patent_doc_number] => 20040063302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Semiconductor substrate with defects reduced or removed and method of manufacturing the same, and semiconductor device capable of bidirectionally retaining breakdown voltage and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/366520 [patent_app_country] => US [patent_app_date] => 2003-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6246 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20040063302.pdf [firstpage_image] =>[orig_patent_app_number] => 10366520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/366520
Semiconductor substrate with defects reduced or removed and method of manufacturing the same, and semiconductor device capable of bidirectionally retaining breakdown voltage and method of manufacturing the same Feb 13, 2003 Abandoned
Array ( [id] => 1134466 [patent_doc_number] => RE038565 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Thin film ferroelectric capacitors having improved memory retention through the use of essentially smooth bottom electrode structures' [patent_app_type] => E1 [patent_app_number] => 10/359997 [patent_app_country] => US [patent_app_date] => 2003-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 12072 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/038/RE038565.pdf [firstpage_image] =>[orig_patent_app_number] => 10359997 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359997
Thin film ferroelectric capacitors having improved memory retention through the use of essentially smooth bottom electrode structures Feb 5, 2003 Issued
Array ( [id] => 6851571 [patent_doc_number] => 20030143774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Optical semiconductor integrated circuit device and manufacturing method for the same' [patent_app_type] => new [patent_app_number] => 10/355220 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5771 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20030143774.pdf [firstpage_image] =>[orig_patent_app_number] => 10355220 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/355220
Optical semiconductor integrated circuit device and manufacturing method for the same Jan 30, 2003 Issued
Array ( [id] => 1177330 [patent_doc_number] => 06743699 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Method of fabricating semiconductor components' [patent_app_type] => B1 [patent_app_number] => 10/349220 [patent_app_country] => US [patent_app_date] => 2003-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3042 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/743/06743699.pdf [firstpage_image] =>[orig_patent_app_number] => 10349220 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/349220
Method of fabricating semiconductor components Jan 20, 2003 Issued
Array ( [id] => 1216532 [patent_doc_number] => 06706629 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Barrier-free copper interconnect' [patent_app_type] => B1 [patent_app_number] => 10/338120 [patent_app_country] => US [patent_app_date] => 2003-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3923 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706629.pdf [firstpage_image] =>[orig_patent_app_number] => 10338120 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/338120
Barrier-free copper interconnect Jan 6, 2003 Issued
Array ( [id] => 7295980 [patent_doc_number] => 20040124527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Folded BGA package design with shortened communication paths and more electrical routing flexibility' [patent_app_type] => new [patent_app_number] => 10/334650 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124527.pdf [firstpage_image] =>[orig_patent_app_number] => 10334650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/334650
Folded BGA package design with shortened communication paths and more electrical routing flexibility Dec 30, 2002 Issued
Array ( [id] => 6696929 [patent_doc_number] => 20030109123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Method of forming a via hole in a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/329794 [patent_app_country] => US [patent_app_date] => 2002-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5656 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20030109123.pdf [firstpage_image] =>[orig_patent_app_number] => 10329794 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/329794
Method of forming a via hole in a semiconductor device Dec 26, 2002 Issued
Array ( [id] => 6653366 [patent_doc_number] => 20030131929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Protective tape applying method and apparatus, and protective tape separating method' [patent_app_type] => new [patent_app_number] => 10/327880 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5505 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20030131929.pdf [firstpage_image] =>[orig_patent_app_number] => 10327880 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327880
Protective tape applying method and apparatus, and protective tape separating method Dec 25, 2002 Issued
Array ( [id] => 6761444 [patent_doc_number] => 20030124806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => new [patent_app_number] => 10/325915 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9388 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20030124806.pdf [firstpage_image] =>[orig_patent_app_number] => 10325915 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/325915
Method of fabricating semiconductor device Dec 22, 2002 Issued
Array ( [id] => 1009697 [patent_doc_number] => 06900459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Apparatus for automatically positioning electronic dice within component packages' [patent_app_type] => utility [patent_app_number] => 10/310752 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 32 [patent_no_of_words] => 11872 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900459.pdf [firstpage_image] =>[orig_patent_app_number] => 10310752 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/310752
Apparatus for automatically positioning electronic dice within component packages Dec 4, 2002 Issued
Array ( [id] => 6870167 [patent_doc_number] => 20030082856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => ' Method and apparatus for a semiconductor package for vertical surface mounting' [patent_app_type] => new [patent_app_number] => 10/304911 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20030082856.pdf [firstpage_image] =>[orig_patent_app_number] => 10304911 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/304911
Method and apparatus for a semiconductor package for vertical surface mounting Nov 25, 2002 Issued
Array ( [id] => 1063597 [patent_doc_number] => 06849873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Thin film transistor array panel for a liquid crystal display' [patent_app_type] => utility [patent_app_number] => 10/303016 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 74 [patent_no_of_words] => 9830 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/849/06849873.pdf [firstpage_image] =>[orig_patent_app_number] => 10303016 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/303016
Thin film transistor array panel for a liquid crystal display Nov 24, 2002 Issued
Array ( [id] => 1115493 [patent_doc_number] => 06800503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-05 [patent_title] => 'MEMS encapsulated structure and method of making same' [patent_app_type] => B2 [patent_app_number] => 10/300520 [patent_app_country] => US [patent_app_date] => 2002-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 27 [patent_no_of_words] => 7282 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/800/06800503.pdf [firstpage_image] =>[orig_patent_app_number] => 10300520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/300520
MEMS encapsulated structure and method of making same Nov 19, 2002 Issued
Array ( [id] => 6787797 [patent_doc_number] => 20030139036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/285520 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5460 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20030139036.pdf [firstpage_image] =>[orig_patent_app_number] => 10285520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/285520
Semiconductor device and method for fabricating the same Oct 31, 2002 Issued
Array ( [id] => 7625584 [patent_doc_number] => 06723585 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Leadless package' [patent_app_type] => B1 [patent_app_number] => 10/286320 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5007 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/723/06723585.pdf [firstpage_image] =>[orig_patent_app_number] => 10286320 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/286320
Leadless package Oct 30, 2002 Issued
Array ( [id] => 6627922 [patent_doc_number] => 20030102552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'In-situ cap and method of fabricating same for an integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/270872 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3922 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20030102552.pdf [firstpage_image] =>[orig_patent_app_number] => 10270872 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/270872
In-situ cap and method of fabricating same for an integrated circuit device Oct 14, 2002 Issued
Array ( [id] => 1156232 [patent_doc_number] => 06762109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-13 [patent_title] => 'Method of manufacturing semiconductor device with reduced number of process steps for capacitor formation' [patent_app_type] => B2 [patent_app_number] => 10/262920 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 67 [patent_no_of_words] => 10633 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762109.pdf [firstpage_image] =>[orig_patent_app_number] => 10262920 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262920
Method of manufacturing semiconductor device with reduced number of process steps for capacitor formation Oct 2, 2002 Issued
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