Search

Belur V. Keshavan

Examiner (ID: 12700)

Most Active Art Unit
2825
Art Unit(s)
2825, 2823
Total Applications
284
Issued Applications
267
Pending Applications
6
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13111565 [patent_doc_number] => 10074440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Erase for partially programmed blocks in non-volatile memory [patent_app_type] => utility [patent_app_number] => 15/337522 [patent_app_country] => US [patent_app_date] => 2016-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 35 [patent_no_of_words] => 17625 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15337522 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/337522
Erase for partially programmed blocks in non-volatile memory Oct 27, 2016 Issued
Array ( [id] => 11890724 [patent_doc_number] => 09761287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Semiconductor memory device, memory system including the same and operating method thereof' [patent_app_type] => utility [patent_app_number] => 15/291725 [patent_app_country] => US [patent_app_date] => 2016-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5770 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15291725 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/291725
Semiconductor memory device, memory system including the same and operating method thereof Oct 11, 2016 Issued
Array ( [id] => 11615313 [patent_doc_number] => 09653175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-16 [patent_title] => 'Determination of word line to word line shorts between adjacent blocks' [patent_app_type] => utility [patent_app_number] => 15/283645 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 35 [patent_no_of_words] => 13638 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15283645 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/283645
Determination of word line to word line shorts between adjacent blocks Oct 2, 2016 Issued
Array ( [id] => 12591063 [patent_doc_number] => 20180088850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => APPARATUSES AND METHODS TO CHANGE DATA CATEGORY VALUES [patent_app_type] => utility [patent_app_number] => 15/280596 [patent_app_country] => US [patent_app_date] => 2016-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23110 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15280596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/280596
Apparatuses and methods to change data category values Sep 28, 2016 Issued
Array ( [id] => 13652953 [patent_doc_number] => 09852795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-26 [patent_title] => Methods of operating nonvolatile memory devices, and memory systems including nonvolatile memory devices [patent_app_type] => utility [patent_app_number] => 15/272776 [patent_app_country] => US [patent_app_date] => 2016-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 34 [patent_no_of_words] => 17050 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272776 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272776
Methods of operating nonvolatile memory devices, and memory systems including nonvolatile memory devices Sep 21, 2016 Issued
Array ( [id] => 11890766 [patent_doc_number] => 09761330 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-12 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/271734 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6190 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271734 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271734
Semiconductor device Sep 20, 2016 Issued
Array ( [id] => 11925378 [patent_doc_number] => 09792964 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-17 [patent_title] => 'Apparatus of offset voltage adjustment in input buffer' [patent_app_type] => utility [patent_app_number] => 15/270996 [patent_app_country] => US [patent_app_date] => 2016-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6751 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15270996 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/270996
Apparatus of offset voltage adjustment in input buffer Sep 19, 2016 Issued
Array ( [id] => 13256747 [patent_doc_number] => 10141067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => Magnetic memory device [patent_app_type] => utility [patent_app_number] => 15/252936 [patent_app_country] => US [patent_app_date] => 2016-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 47 [patent_no_of_words] => 15101 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15252936 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/252936
Magnetic memory device Aug 30, 2016 Issued
Array ( [id] => 12005169 [patent_doc_number] => 20170309324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'VOLATILE MEMORY DEVICE EMPLOYING A RESISTIVE MEMORY ELEMENT' [patent_app_type] => utility [patent_app_number] => 15/251818 [patent_app_country] => US [patent_app_date] => 2016-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 15575 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15251818 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/251818
Volatile memory device employing a resistive memory element Aug 29, 2016 Issued
Array ( [id] => 12019502 [patent_doc_number] => 09812211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/224669 [patent_app_country] => US [patent_app_date] => 2016-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 63 [patent_no_of_words] => 21451 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15224669 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/224669
Semiconductor device Jul 31, 2016 Issued
Array ( [id] => 12162220 [patent_doc_number] => 20180033486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'FERROELECTRIC MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/224438 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 17085 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15224438 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/224438
Ferroelectric memory device Jul 28, 2016 Issued
Array ( [id] => 11861757 [patent_doc_number] => 09741445 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-22 [patent_title] => 'Cut layer programmable memory' [patent_app_type] => utility [patent_app_number] => 15/222532 [patent_app_country] => US [patent_app_date] => 2016-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4529 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15222532 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/222532
Cut layer programmable memory Jul 27, 2016 Issued
Array ( [id] => 11571537 [patent_doc_number] => 20170110181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'SRAM CELL FOR INTERLEAVED WORDLINE SCHEME' [patent_app_type] => utility [patent_app_number] => 15/222914 [patent_app_country] => US [patent_app_date] => 2016-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15222914 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/222914
SRAM cell for interleaved wordline scheme Jul 27, 2016 Issued
Array ( [id] => 12154501 [patent_doc_number] => 20180025766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'Integrated Memory Device and Method of Operating Same' [patent_app_type] => utility [patent_app_number] => 15/218336 [patent_app_country] => US [patent_app_date] => 2016-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12288 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15218336 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/218336
Integrated memory device and method of operating same Jul 24, 2016 Issued
Array ( [id] => 11539299 [patent_doc_number] => 09613713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 15/195560 [patent_app_country] => US [patent_app_date] => 2016-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 104 [patent_figures_cnt] => 131 [patent_no_of_words] => 47978 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15195560 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/195560
Semiconductor memory device Jun 27, 2016 Issued
Array ( [id] => 11753215 [patent_doc_number] => 09711233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Systems and methods for sub-zero threshold characterization in a memory cell' [patent_app_type] => utility [patent_app_number] => 15/195856 [patent_app_country] => US [patent_app_date] => 2016-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7569 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15195856 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/195856
Systems and methods for sub-zero threshold characterization in a memory cell Jun 27, 2016 Issued
Array ( [id] => 11876206 [patent_doc_number] => 09747987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-29 [patent_title] => 'Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells' [patent_app_type] => utility [patent_app_number] => 15/194201 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15194201 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/194201
Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells Jun 26, 2016 Issued
Array ( [id] => 11096263 [patent_doc_number] => 20160293233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/187000 [patent_app_country] => US [patent_app_date] => 2016-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10371 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15187000 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/187000
Semiconductor memory apparatus Jun 19, 2016 Issued
Array ( [id] => 11475253 [patent_doc_number] => 20170062035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'MEMORY DEVICE INCLUDING BOOSTED VOLTAGE GENERATOR' [patent_app_type] => utility [patent_app_number] => 15/176264 [patent_app_country] => US [patent_app_date] => 2016-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 16215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15176264 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/176264
Memory device including boosted voltage generator Jun 7, 2016 Issued
Array ( [id] => 12101925 [patent_doc_number] => 09859023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Memory test system and method of testing memory device' [patent_app_type] => utility [patent_app_number] => 15/176618 [patent_app_country] => US [patent_app_date] => 2016-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 10015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15176618 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/176618
Memory test system and method of testing memory device Jun 7, 2016 Issued
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