Search

Belur V. Keshavan

Examiner (ID: 12700)

Most Active Art Unit
2825
Art Unit(s)
2825, 2823
Total Applications
284
Issued Applications
267
Pending Applications
6
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11279530 [patent_doc_number] => 09496011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Semiconductor memory device, memory system including the same and operating method thereof' [patent_app_type] => utility [patent_app_number] => 14/082941 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5762 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082941 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/082941
Semiconductor memory device, memory system including the same and operating method thereof Nov 17, 2013 Issued
Array ( [id] => 9697992 [patent_doc_number] => 20140247677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-04 [patent_title] => 'METHOD OF ACCESSING SEMICONDUCTOR MEMORY AND SEMICONDUCTOR CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/081493 [patent_app_country] => US [patent_app_date] => 2013-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7036 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14081493 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/081493
METHOD OF ACCESSING SEMICONDUCTOR MEMORY AND SEMICONDUCTOR CIRCUIT Nov 14, 2013 Abandoned
Array ( [id] => 10952349 [patent_doc_number] => 20140355370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'SEMICONDUCTOR SYSTEM AND SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/031867 [patent_app_country] => US [patent_app_date] => 2013-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14031867 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/031867
Semiconductor system and semiconductor package Sep 18, 2013 Issued
Array ( [id] => 10590348 [patent_doc_number] => 09311968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Read tracking mechanism' [patent_app_type] => utility [patent_app_number] => 14/030497 [patent_app_country] => US [patent_app_date] => 2013-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4453 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14030497 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/030497
Read tracking mechanism Sep 17, 2013 Issued
Array ( [id] => 10165137 [patent_doc_number] => 09196366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Semiconductor memory apparatus and method for erasing the same' [patent_app_type] => utility [patent_app_number] => 14/029807 [patent_app_country] => US [patent_app_date] => 2013-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5930 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14029807 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/029807
Semiconductor memory apparatus and method for erasing the same Sep 17, 2013 Issued
Array ( [id] => 10073283 [patent_doc_number] => 09111644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Readout circuit and semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/029251 [patent_app_country] => US [patent_app_date] => 2013-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2439 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14029251 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/029251
Readout circuit and semiconductor device Sep 16, 2013 Issued
Array ( [id] => 9180183 [patent_doc_number] => 20130322168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'MEMORY APPARATUS WITH GATED PHASE-CHANGE MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 13/927778 [patent_app_country] => US [patent_app_date] => 2013-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5811 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13927778 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/927778
Memory apparatus with gated phase-change memory cells Jun 25, 2013 Issued
Array ( [id] => 10966094 [patent_doc_number] => 20140369126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'SIMPLIFIED NONVOLATILE MEMORY CELL STRING AND NAND FLASH MEMORY ARRAY USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/919114 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919114 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919114
Simplified nonvolatile memory cell string and NAND flash memory array using the same Jun 16, 2013 Issued
Array ( [id] => 10047175 [patent_doc_number] => 09087574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Memory apparatus with gated phase-change memory cells' [patent_app_type] => utility [patent_app_number] => 13/900224 [patent_app_country] => US [patent_app_date] => 2013-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5792 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900224 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900224
Memory apparatus with gated phase-change memory cells May 21, 2013 Issued
Array ( [id] => 9052932 [patent_doc_number] => 20130250646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/900282 [patent_app_country] => US [patent_app_date] => 2013-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6936 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900282 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900282
Semiconductor memory device May 21, 2013 Issued
Array ( [id] => 10551122 [patent_doc_number] => 09275753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Circuit and method for reducing write disturb in a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 13/896712 [patent_app_country] => US [patent_app_date] => 2013-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 7270 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13896712 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/896712
Circuit and method for reducing write disturb in a non-volatile memory device May 16, 2013 Issued
Array ( [id] => 11770136 [patent_doc_number] => 09378821 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-28 [patent_title] => 'Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells' [patent_app_type] => utility [patent_app_number] => 13/791758 [patent_app_country] => US [patent_app_date] => 2013-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7920 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13791758 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/791758
Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells Mar 7, 2013 Issued
Array ( [id] => 9718535 [patent_doc_number] => 20140254233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'Redundant Fuse Coding' [patent_app_type] => utility [patent_app_number] => 13/788009 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6229 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788009 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/788009
Redundant fuse coding Mar 6, 2013 Issued
Array ( [id] => 10631298 [patent_doc_number] => 09349452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Hybrid non-volatile memory cells for shared bit line' [patent_app_type] => utility [patent_app_number] => 13/788183 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 29 [patent_no_of_words] => 10965 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788183 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/788183
Hybrid non-volatile memory cells for shared bit line Mar 6, 2013 Issued
Array ( [id] => 9067033 [patent_doc_number] => 20130258789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'SEMICONDUCTOR MEMORY AND METHOD OF OPERATING SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 13/789059 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11280 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789059 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/789059
Semiconductor memory and method of operating semiconductor memory Mar 6, 2013 Issued
Array ( [id] => 9718539 [patent_doc_number] => 20140254237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'Method for Operating RRAM Memory' [patent_app_type] => utility [patent_app_number] => 13/788063 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2494 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788063 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/788063
Method for operating RRAM memory Mar 6, 2013 Issued
Array ( [id] => 11775893 [patent_doc_number] => 09384839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Write sequence providing write abort protection' [patent_app_type] => utility [patent_app_number] => 13/788415 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 7489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788415 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/788415
Write sequence providing write abort protection Mar 6, 2013 Issued
Array ( [id] => 9052943 [patent_doc_number] => 20130250657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'System and Method for Writing Data to an RRAM Cell' [patent_app_type] => utility [patent_app_number] => 13/789543 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15598 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789543 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/789543
System and Method for Writing Data to an RRAM Cell Mar 6, 2013 Abandoned
Array ( [id] => 9718533 [patent_doc_number] => 20140254232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'INTEGRATED CIRCUIT DEVICES HAVING MEMORY AND METHODS OF IMPLEMENTING MEMORY IN AN INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/789313 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789313 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/789313
Integrated circuit devices having memory and methods of implementing memory in an integrated circuit device Mar 6, 2013 Issued
Array ( [id] => 9040002 [patent_doc_number] => 20130242640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'Methods and Systems for Resistive Change Memory Cell Restoration' [patent_app_type] => utility [patent_app_number] => 13/789557 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789557 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/789557
Methods and Systems for Resistive Change Memory Cell Restoration Mar 6, 2013 Abandoned
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