Search

Belur V. Keshavan

Examiner (ID: 12700)

Most Active Art Unit
2825
Art Unit(s)
2825, 2823
Total Applications
284
Issued Applications
267
Pending Applications
6
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19175885 [patent_doc_number] => 20240161859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION [patent_app_type] => utility [patent_app_number] => 18/504353 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504353 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504353
APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION Nov 7, 2023 Pending
Array ( [id] => 19205863 [patent_doc_number] => 20240177762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SELECTABLE MEMORY SYSTEM ERASE FUNCTION [patent_app_type] => utility [patent_app_number] => 18/501873 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16372 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501873 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/501873
Selectable memory system erase function Nov 2, 2023 Issued
Array ( [id] => 19720123 [patent_doc_number] => 12205666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Pipe latch circuit, operating method thereof, and semiconductor memory device including the same [patent_app_type] => utility [patent_app_number] => 18/501432 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6637 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501432 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/501432
Pipe latch circuit, operating method thereof, and semiconductor memory device including the same Nov 2, 2023 Issued
Array ( [id] => 19596801 [patent_doc_number] => 12154654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Dynamic random access memory speed bin compatibility [patent_app_type] => utility [patent_app_number] => 18/386518 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 15663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386518 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/386518
Dynamic random access memory speed bin compatibility Nov 1, 2023 Issued
Array ( [id] => 19781318 [patent_doc_number] => 12230356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Memory device, memory system, and operating method of memory system [patent_app_type] => utility [patent_app_number] => 18/384973 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 16186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384973 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384973
Memory device, memory system, and operating method of memory system Oct 29, 2023 Issued
Array ( [id] => 19459973 [patent_doc_number] => 12100475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Apparatus, memory controller, memory device, memory system, and method for clock switching and low power consumption [patent_app_type] => utility [patent_app_number] => 18/496693 [patent_app_country] => US [patent_app_date] => 2023-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 18270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496693 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/496693
Apparatus, memory controller, memory device, memory system, and method for clock switching and low power consumption Oct 26, 2023 Issued
Array ( [id] => 20229139 [patent_doc_number] => 12417793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 18/491849 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 32 [patent_no_of_words] => 7434 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18491849 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/491849
Semiconductor storage device Oct 22, 2023 Issued
Array ( [id] => 20175705 [patent_doc_number] => 12394458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Memory clock control circuit and method for controlling memory clock [patent_app_type] => utility [patent_app_number] => 18/382565 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382565 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/382565
Memory clock control circuit and method for controlling memory clock Oct 22, 2023 Issued
Array ( [id] => 19993745 [patent_doc_number] => 20250131967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => MEMORY DEVICE AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/490234 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490234 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490234
MEMORY DEVICE AND METHOD FOR OPERATING THE SAME Oct 18, 2023 Pending
Array ( [id] => 19943420 [patent_doc_number] => 12315556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/380876 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 1088 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/380876
Semiconductor device and method for manufacturing the same Oct 16, 2023 Issued
Array ( [id] => 19893071 [patent_doc_number] => 20250118383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => ONE-TIME PROGRAMMABLE MEMORY DEVICES WITH HEATER DEVICES AND METHODS FOR MANUFACTURING AND OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/483745 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483745 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/483745
ONE-TIME PROGRAMMABLE MEMORY DEVICES WITH HEATER DEVICES AND METHODS FOR MANUFACTURING AND OPERATING THE SAME Oct 9, 2023 Pending
Array ( [id] => 19696115 [patent_doc_number] => 20250014660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SMALL-AREA COMMON-VOLTAGE ANTI-FUSE ARRAY [patent_app_type] => utility [patent_app_number] => 18/480743 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480743 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480743
Small-area common-voltage anti-fuse array Oct 3, 2023 Issued
Array ( [id] => 20624759 [patent_doc_number] => 12592271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Apparatuses and methods for increased reliability row hammer counts [patent_app_type] => utility [patent_app_number] => 18/481134 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6061 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481134 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/481134
Apparatuses and methods for increased reliability row hammer counts Oct 3, 2023 Issued
Array ( [id] => 19191136 [patent_doc_number] => 20240170049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => MEMORY DEVICE HAVING UNITY BUFFERS WITH OUTPUT CURRENT LIMITERS [patent_app_type] => utility [patent_app_number] => 18/480207 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480207 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480207
MEMORY DEVICE HAVING UNITY BUFFERS WITH OUTPUT CURRENT LIMITERS Oct 2, 2023 Pending
Array ( [id] => 19414515 [patent_doc_number] => 12080349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Content addressable memory device having electrically floating body transistor [patent_app_type] => utility [patent_app_number] => 18/367117 [patent_app_country] => US [patent_app_date] => 2023-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 103 [patent_figures_cnt] => 139 [patent_no_of_words] => 29412 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367117 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/367117
Content addressable memory device having electrically floating body transistor Sep 11, 2023 Issued
Array ( [id] => 19452370 [patent_doc_number] => 20240312500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/462254 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462254 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/462254
POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM USING THE SAME Sep 5, 2023 Pending
Array ( [id] => 20345792 [patent_doc_number] => 12469527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => In situ delay measurements on integrated circuits using live data and pulse width modulation [patent_app_type] => utility [patent_app_number] => 18/462380 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 1227 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462380 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/462380
In situ delay measurements on integrated circuits using live data and pulse width modulation Sep 5, 2023 Issued
Array ( [id] => 18851020 [patent_doc_number] => 20230413424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MODULE BOARD AND MEMORY MODULE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/240619 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18240619 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/240619
Module board and memory module including the same Aug 30, 2023 Issued
Array ( [id] => 19823242 [patent_doc_number] => 20250081449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => ASYMMETRICAL CHANNEL FLOATING GATE THREE-STATE ONE-TIME PROGRAMMABLE NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/240580 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18240580 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/240580
ASYMMETRICAL CHANNEL FLOATING GATE THREE-STATE ONE-TIME PROGRAMMABLE NONVOLATILE MEMORY Aug 30, 2023 Pending
Array ( [id] => 19116124 [patent_doc_number] => 20240127874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR SYSTEM [patent_app_type] => utility [patent_app_number] => 18/458670 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458670
Semiconductor system Aug 29, 2023 Issued
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