
Belur V. Keshavan
Examiner (ID: 18924)
| Most Active Art Unit | 2825 |
| Art Unit(s) | 2823, 2825 |
| Total Applications | 284 |
| Issued Applications | 267 |
| Pending Applications | 6 |
| Abandoned Applications | 11 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6095891
[patent_doc_number] => 20020052085
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[patent_title] => 'Semiconductor device including gate electrode having damascene structure and method of fabricating the same'
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[pdf_file] => publications/A1/0052/20020052085.pdf
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Array
(
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[patent_title] => 'Manufacturing method for semiconductor device'
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Array
(
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[patent_issue_date] => 2002-10-15
[patent_title] => 'In-situ cap and method of fabricating same for an integrated circuit device'
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Array
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[patent_issue_date] => 2001-06-28
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Array
(
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Array
(
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Array
(
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[patent_title] => 'Alpha particle shield for integrated circuit'
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Array
(
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[patent_title] => 'Method for producing dual damascene interconnections and structure produced thereby'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/772920 | Method for producing dual damascene interconnections and structure produced thereby | Jan 30, 2001 | Issued |
Array
(
[id] => 1469747
[patent_doc_number] => 06406945
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[patent_issue_date] => 2002-06-18
[patent_title] => 'Method for forming a transistor gate dielectric with high-K and low-K regions'
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Array
(
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[patent_title] => 'Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs)'
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Array
(
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[patent_title] => 'Vertical DRAM cell with TFT over trench capacitor'
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Array
(
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[patent_title] => 'Conductive adhesive interconnection with insulating polymer carrier'
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Array
(
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Array
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Array
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Array
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Array
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Array
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