Search

Belur V. Keshavan

Examiner (ID: 18924)

Most Active Art Unit
2825
Art Unit(s)
2823, 2825
Total Applications
284
Issued Applications
267
Pending Applications
6
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6095891 [patent_doc_number] => 20020052085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-02 [patent_title] => 'Semiconductor device including gate electrode having damascene structure and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 09/805213 [patent_app_country] => US [patent_app_date] => 2001-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20020052085.pdf [firstpage_image] =>[orig_patent_app_number] => 09805213 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/805213
Semiconductor device including gate electrode having damascene structure and method of fabricating the same Mar 13, 2001 Issued
Array ( [id] => 6986853 [patent_doc_number] => 20010036685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Manufacturing method for semiconductor device' [patent_app_type] => new [patent_app_number] => 09/803050 [patent_app_country] => US [patent_app_date] => 2001-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4480 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20010036685.pdf [firstpage_image] =>[orig_patent_app_number] => 09803050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/803050
Manufacturing method for semiconductor device Mar 11, 2001 Issued
Array ( [id] => 1503349 [patent_doc_number] => 06465280 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'In-situ cap and method of fabricating same for an integrated circuit device' [patent_app_type] => B1 [patent_app_number] => 09/800821 [patent_app_country] => US [patent_app_date] => 2001-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3843 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465280.pdf [firstpage_image] =>[orig_patent_app_number] => 09800821 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/800821
In-situ cap and method of fabricating same for an integrated circuit device Mar 6, 2001 Issued
Array ( [id] => 7040076 [patent_doc_number] => 20010005052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Method of designing and structure for visual and electrical test of semiconductor devices' [patent_app_type] => new-utility [patent_app_number] => 09/788631 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005052.pdf [firstpage_image] =>[orig_patent_app_number] => 09788631 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788631
Method of designing and structure for visual and electrical test of semiconductor devices Feb 15, 2001 Issued
Array ( [id] => 6892067 [patent_doc_number] => 20010018229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Semiconductor device and method for fabricating same' [patent_app_type] => new [patent_app_number] => 09/784490 [patent_app_country] => US [patent_app_date] => 2001-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7143 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20010018229.pdf [firstpage_image] =>[orig_patent_app_number] => 09784490 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/784490
Semiconductor device and method for fabricating same Feb 14, 2001 Issued
Array ( [id] => 6522772 [patent_doc_number] => 20020109208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Method of forming an NPN device' [patent_app_type] => new [patent_app_number] => 09/782820 [patent_app_country] => US [patent_app_date] => 2001-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3249 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20020109208.pdf [firstpage_image] =>[orig_patent_app_number] => 09782820 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782820
Method of forming an NPN device Feb 11, 2001 Issued
Array ( [id] => 1404393 [patent_doc_number] => 06531759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-11 [patent_title] => 'Alpha particle shield for integrated circuit' [patent_app_type] => B2 [patent_app_number] => 09/777540 [patent_app_country] => US [patent_app_date] => 2001-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1389 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531759.pdf [firstpage_image] =>[orig_patent_app_number] => 09777540 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777540
Alpha particle shield for integrated circuit Feb 5, 2001 Issued
Array ( [id] => 6012403 [patent_doc_number] => 20020100983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Method for producing dual damascene interconnections and structure produced thereby' [patent_app_type] => new [patent_app_number] => 09/772920 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1492 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20020100983.pdf [firstpage_image] =>[orig_patent_app_number] => 09772920 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772920
Method for producing dual damascene interconnections and structure produced thereby Jan 30, 2001 Issued
Array ( [id] => 1469747 [patent_doc_number] => 06406945 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Method for forming a transistor gate dielectric with high-K and low-K regions' [patent_app_type] => B1 [patent_app_number] => 09/769810 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2086 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/406/06406945.pdf [firstpage_image] =>[orig_patent_app_number] => 09769810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/769810
Method for forming a transistor gate dielectric with high-K and low-K regions Jan 25, 2001 Issued
Array ( [id] => 5986374 [patent_doc_number] => 20020098655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs)' [patent_app_type] => new [patent_app_number] => 09/765040 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1600 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20020098655.pdf [firstpage_image] =>[orig_patent_app_number] => 09765040 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765040
Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs) Jan 18, 2001 Issued
Array ( [id] => 1544222 [patent_doc_number] => 06373091 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Vertical DRAM cell with TFT over trench capacitor' [patent_app_type] => B1 [patent_app_number] => 09/765561 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2786 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373091.pdf [firstpage_image] =>[orig_patent_app_number] => 09765561 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765561
Vertical DRAM cell with TFT over trench capacitor Jan 18, 2001 Issued
Array ( [id] => 1466908 [patent_doc_number] => 06458623 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Conductive adhesive interconnection with insulating polymer carrier' [patent_app_type] => B1 [patent_app_number] => 09/765030 [patent_app_country] => US [patent_app_date] => 2001-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 7661 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/458/06458623.pdf [firstpage_image] =>[orig_patent_app_number] => 09765030 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765030
Conductive adhesive interconnection with insulating polymer carrier Jan 16, 2001 Issued
Array ( [id] => 6893129 [patent_doc_number] => 20010015495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Process for forming cone shaped solder for chip interconnection' [patent_app_type] => new [patent_app_number] => 09/753819 [patent_app_country] => US [patent_app_date] => 2001-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5040 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20010015495.pdf [firstpage_image] =>[orig_patent_app_number] => 09753819 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/753819
Process for forming cone shaped solder for chip interconnection Jan 2, 2001 Issued
Array ( [id] => 1414998 [patent_doc_number] => 06511863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-28 [patent_title] => 'Method and apparatus for a semiconductor package for vertical surface mounting' [patent_app_type] => B2 [patent_app_number] => 09/749110 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3558 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/511/06511863.pdf [firstpage_image] =>[orig_patent_app_number] => 09749110 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/749110
Method and apparatus for a semiconductor package for vertical surface mounting Dec 25, 2000 Issued
Array ( [id] => 7040998 [patent_doc_number] => 20010005598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Method of manufacturing an active matrix device' [patent_app_type] => new-utility [patent_app_number] => 09/738920 [patent_app_country] => US [patent_app_date] => 2000-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3225 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005598.pdf [firstpage_image] =>[orig_patent_app_number] => 09738920 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/738920
Method of manufacturing an active matrix device Dec 13, 2000 Issued
Array ( [id] => 1404523 [patent_doc_number] => 06531766 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Semiconductor package and production method thereof' [patent_app_type] => B1 [patent_app_number] => 09/718361 [patent_app_country] => US [patent_app_date] => 2000-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4559 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531766.pdf [firstpage_image] =>[orig_patent_app_number] => 09718361 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/718361
Semiconductor package and production method thereof Nov 23, 2000 Issued
Array ( [id] => 7631379 [patent_doc_number] => 06635553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Microelectronic assemblies with multiple leads' [patent_app_type] => B1 [patent_app_number] => 09/721048 [patent_app_country] => US [patent_app_date] => 2000-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 30 [patent_no_of_words] => 13165 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635553.pdf [firstpage_image] =>[orig_patent_app_number] => 09721048 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721048
Microelectronic assemblies with multiple leads Nov 21, 2000 Issued
Array ( [id] => 1450026 [patent_doc_number] => 06455404 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Semiconductor device and method for fabricating same' [patent_app_type] => B1 [patent_app_number] => 09/710840 [patent_app_country] => US [patent_app_date] => 2000-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 3152 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/455/06455404.pdf [firstpage_image] =>[orig_patent_app_number] => 09710840 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/710840
Semiconductor device and method for fabricating same Nov 13, 2000 Issued
Array ( [id] => 1163241 [patent_doc_number] => 06759307 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-06 [patent_title] => 'Method to prevent die attach adhesive contamination in stacked chips' [patent_app_type] => B1 [patent_app_number] => 09/703920 [patent_app_country] => US [patent_app_date] => 2000-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5566 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/759/06759307.pdf [firstpage_image] =>[orig_patent_app_number] => 09703920 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/703920
Method to prevent die attach adhesive contamination in stacked chips Oct 31, 2000 Issued
Array ( [id] => 1414000 [patent_doc_number] => 06521473 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Method of fabricating a liquid crystal display' [patent_app_type] => B1 [patent_app_number] => 09/697300 [patent_app_country] => US [patent_app_date] => 2000-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2979 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521473.pdf [firstpage_image] =>[orig_patent_app_number] => 09697300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/697300
Method of fabricating a liquid crystal display Oct 26, 2000 Issued
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