Search

Ben Lewis

Examiner (ID: 86, Phone: (571)272-6481 , Office: P/1726 )

Most Active Art Unit
1726
Art Unit(s)
1726, 1729, 1795, 1745
Total Applications
940
Issued Applications
662
Pending Applications
14
Abandoned Applications
270

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19376656 [patent_doc_number] => 12068236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Electronic module [patent_app_type] => utility [patent_app_number] => 17/539321 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17539321 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/539321
Electronic module Nov 30, 2021 Issued
Array ( [id] => 19063141 [patent_doc_number] => 11942391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => System in package with flip chip die over multi-layer heatsink stanchion [patent_app_type] => utility [patent_app_number] => 17/538583 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 32 [patent_no_of_words] => 12843 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538583 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538583
System in package with flip chip die over multi-layer heatsink stanchion Nov 29, 2021 Issued
Array ( [id] => 18906004 [patent_doc_number] => 20240021489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => Electronic Package and Device Comprising the Same [patent_app_type] => utility [patent_app_number] => 18/255248 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18255248 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/255248
Electronic Package and Device Comprising the Same Nov 29, 2021 Pending
Array ( [id] => 18338535 [patent_doc_number] => 20230130484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => SEMICONDUCTOR PACKAGE DEVICE WITH DEDICATED HEAT-DISSIPATION FEATURE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/536328 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536328
Semiconductor package device with dedicated heat-dissipation feature and method of manufacturing semiconductor package device Nov 28, 2021 Issued
Array ( [id] => 19153759 [patent_doc_number] => 11978682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Package, and method for manufacturing power semiconductor module [patent_app_type] => utility [patent_app_number] => 17/455719 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8585 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455719 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/455719
Package, and method for manufacturing power semiconductor module Nov 18, 2021 Issued
Array ( [id] => 18416025 [patent_doc_number] => 11670572 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/455619 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 53 [patent_no_of_words] => 21298 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455619 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/455619
Semiconductor device Nov 17, 2021 Issued
Array ( [id] => 18782209 [patent_doc_number] => 11823975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Semiconductor packages including different type semiconductor chips having exposed top surfaces and methods of manufacturing the semiconductor packages [patent_app_type] => utility [patent_app_number] => 17/523698 [patent_app_country] => US [patent_app_date] => 2021-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3430 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17523698 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/523698
Semiconductor packages including different type semiconductor chips having exposed top surfaces and methods of manufacturing the semiconductor packages Nov 9, 2021 Issued
Array ( [id] => 17448360 [patent_doc_number] => 20220068865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 17/522825 [patent_app_country] => US [patent_app_date] => 2021-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17522825 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/522825
Semiconductor device and semiconductor package Nov 8, 2021 Issued
Array ( [id] => 17523106 [patent_doc_number] => 20220108955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => EMBEDDED DIE PACKAGING WITH INTEGRATED CERAMIC SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/517608 [patent_app_country] => US [patent_app_date] => 2021-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/517608
Embedded die packaging with integrated ceramic substrate Nov 1, 2021 Issued
Array ( [id] => 18175292 [patent_doc_number] => 11575011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Superlattice structure including two-dimensional material and device including the superlattice structure [patent_app_type] => utility [patent_app_number] => 17/515713 [patent_app_country] => US [patent_app_date] => 2021-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 7324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17515713 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/515713
Superlattice structure including two-dimensional material and device including the superlattice structure Oct 31, 2021 Issued
Array ( [id] => 18272183 [patent_doc_number] => 20230093425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => POWER MESH STRUCTURE FOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/510974 [patent_app_country] => US [patent_app_date] => 2021-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 467 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17510974 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/510974
Power mesh structure for integrated circuit Oct 25, 2021 Issued
Array ( [id] => 17599360 [patent_doc_number] => 20220148934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => LINEAR SPACER FOR SPACING A CARRIER OF A PACKAGE [patent_app_type] => utility [patent_app_number] => 17/501568 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501568
Linear spacer for spacing a carrier of a package Oct 13, 2021 Issued
Array ( [id] => 17373769 [patent_doc_number] => 20220028821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => CONTACT AND DIE ATTACH METALLIZATION FOR SILICON CARBIDE BASED DEVICES AND RELATED METHODS OF SPUTTERING EUTECTIC ALLOYS [patent_app_type] => utility [patent_app_number] => 17/494909 [patent_app_country] => US [patent_app_date] => 2021-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494909 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/494909
Contact and die attach metallization for silicon carbide based devices and related methods of sputtering eutectic alloys Oct 5, 2021 Issued
Array ( [id] => 19414795 [patent_doc_number] => 12080632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Glass core package substrates [patent_app_type] => utility [patent_app_number] => 17/489182 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4148 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489182
Glass core package substrates Sep 28, 2021 Issued
Array ( [id] => 17347097 [patent_doc_number] => 20220013428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/484337 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17484337 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/484337
ELECTRONIC DEVICE Sep 23, 2021 Abandoned
Array ( [id] => 20346031 [patent_doc_number] => 12469766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Power semiconductor device [patent_app_type] => utility [patent_app_number] => 18/026270 [patent_app_country] => US [patent_app_date] => 2021-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18026270 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/026270
Power semiconductor device Sep 16, 2021 Issued
Array ( [id] => 19980292 [patent_doc_number] => 12347780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Integrated circuit package with flipped high bandwidth memory device [patent_app_type] => utility [patent_app_number] => 17/475726 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475726 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/475726
Integrated circuit package with flipped high bandwidth memory device Sep 14, 2021 Issued
Array ( [id] => 17486028 [patent_doc_number] => 20220093532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THEREOF [patent_app_type] => utility [patent_app_number] => 17/470370 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470370 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470370
Semiconductor device and method for fabricating thereof Sep 8, 2021 Issued
Array ( [id] => 19213663 [patent_doc_number] => 12002735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/469698 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469698 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469698
Semiconductor package Sep 7, 2021 Issued
Array ( [id] => 17933303 [patent_doc_number] => 20220328429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => GROUNDED METAL RING STRUCTURE FOR THROUGH-SILICON VIA [patent_app_type] => utility [patent_app_number] => 17/468886 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468886 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468886
Grounded metal ring structure for through-silicon via Sep 7, 2021 Issued
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