Search

Ben M. Rifkin

Examiner (ID: 4538, Phone: (571)272-9768 , Office: P/2122 )

Most Active Art Unit
2122
Art Unit(s)
2129, 2122, 2123, 2198, 2124
Total Applications
531
Issued Applications
222
Pending Applications
99
Abandoned Applications
229

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14234631 [patent_doc_number] => 20190129488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/219758 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219758 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/219758
Semiconductor device Dec 12, 2018 Issued
Array ( [id] => 14136337 [patent_doc_number] => 20190102558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => Method and Apparatus for Secure System Boot [patent_app_type] => utility [patent_app_number] => 16/205838 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16205838 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/205838
Method and Apparatus for Secure System Boot Nov 29, 2018 Abandoned
Array ( [id] => 14107081 [patent_doc_number] => 20190095216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => Dynamic Reconfiguration of Multi-core Processor [patent_app_type] => utility [patent_app_number] => 16/203819 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38521 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203819 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203819
Dynamic reconfiguration of multi-core processor Nov 28, 2018 Issued
Array ( [id] => 14218057 [patent_doc_number] => 20190121413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => POWER SUPPLYING METHOD FOR COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 16/163775 [patent_app_country] => US [patent_app_date] => 2018-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2696 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16163775 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/163775
Power supplying method for computer system Oct 17, 2018 Issued
Array ( [id] => 13783421 [patent_doc_number] => 20190005249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => ASSURED COMPUTER ARCHITECTURE -VOLATILE MEMORY DESIGN AND OPERATION [patent_app_type] => utility [patent_app_number] => 16/101965 [patent_app_country] => US [patent_app_date] => 2018-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16101965 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/101965
ASSURED COMPUTER ARCHITECTURE -VOLATILE MEMORY DESIGN AND OPERATION Aug 12, 2018 Abandoned
Array ( [id] => 13568567 [patent_doc_number] => 20180335831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => APPARATUS AND METHOD FOR THERMAL MANAGEMENT IN A MULTI-CHIP PACKAGE [patent_app_type] => utility [patent_app_number] => 16/052375 [patent_app_country] => US [patent_app_date] => 2018-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052375 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/052375
APPARATUS AND METHOD FOR THERMAL MANAGEMENT IN A MULTI-CHIP PACKAGE Jul 31, 2018 Abandoned
Array ( [id] => 15613991 [patent_doc_number] => 10588087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Timer for low-power communications systems [patent_app_type] => utility [patent_app_number] => 15/989272 [patent_app_country] => US [patent_app_date] => 2018-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11085 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15989272 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/989272
Timer for low-power communications systems May 24, 2018 Issued
Array ( [id] => 12734572 [patent_doc_number] => 20180136691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => FREQUENCY CALIBRATION METHOD APPLICABLE IN UNIVERSAL SERIAL BUS DEVICE AND RELATED UNIVERSAL SERIAL BUS DEVICE [patent_app_type] => utility [patent_app_number] => 15/871011 [patent_app_country] => US [patent_app_date] => 2018-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15871011 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/871011
Frequency calibration method applicable in universal serial bus device and related universal serial bus device Jan 13, 2018 Issued
Array ( [id] => 14347483 [patent_doc_number] => 20190155714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => DETERMINING REBOOT TIMES OF COMPUTING NODES [patent_app_type] => utility [patent_app_number] => 15/820999 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820999 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820999
Determining reboot times of computing nodes Nov 21, 2017 Issued
Array ( [id] => 13594603 [patent_doc_number] => 20180348850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => CONTROL OF POWER STATE TRANSITIONS [patent_app_type] => utility [patent_app_number] => 15/720916 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720916 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720916
Control of power state transitions Sep 28, 2017 Issued
Array ( [id] => 14107085 [patent_doc_number] => 20190095218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => CREATING OR MODIFYING ARTIFACTS ON MOUNTED OPERATING SYSTEM VOLUMES [patent_app_type] => utility [patent_app_number] => 15/715445 [patent_app_country] => US [patent_app_date] => 2017-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15715445 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/715445
CREATING OR MODIFYING ARTIFACTS ON MOUNTED OPERATING SYSTEM VOLUMES Sep 25, 2017 Abandoned
Array ( [id] => 12003983 [patent_doc_number] => 20170308138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING ACTIVE MODE AND STANDBY MODE' [patent_app_type] => utility [patent_app_number] => 15/649051 [patent_app_country] => US [patent_app_date] => 2017-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9161 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15649051 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/649051
Semiconductor device having active mode and standby mode Jul 12, 2017 Issued
Array ( [id] => 14917199 [patent_doc_number] => 10429918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Controlling turbo mode frequency operation in a processor [patent_app_type] => utility [patent_app_number] => 15/615937 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14390 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615937 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/615937
Controlling turbo mode frequency operation in a processor Jun 6, 2017 Issued
Array ( [id] => 13579525 [patent_doc_number] => 20180341311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => TIMER FOR LOW-POWER COMMUNICATIONS SYSTEMS [patent_app_type] => utility [patent_app_number] => 15/605976 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605976 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605976
Timer for low-power communications systems May 25, 2017 Issued
Array ( [id] => 16844461 [patent_doc_number] => 11016545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Thermal throttling for memory devices [patent_app_type] => utility [patent_app_number] => 15/473044 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6103 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15473044 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/473044
Thermal throttling for memory devices Mar 28, 2017 Issued
Array ( [id] => 13466633 [patent_doc_number] => 20180284859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => Power Multiplexing with an Active Load [patent_app_type] => utility [patent_app_number] => 15/471692 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471692 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471692
Power multiplexing with an active load Mar 27, 2017 Issued
Array ( [id] => 16065703 [patent_doc_number] => 10691803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Secure execution environment on a server [patent_app_type] => utility [patent_app_number] => 15/377991 [patent_app_country] => US [patent_app_date] => 2016-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 18762 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15377991 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/377991
Secure execution environment on a server Dec 12, 2016 Issued
Array ( [id] => 12819082 [patent_doc_number] => 20180164866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => LOW-POWER ARCHITECTURE FOR SPARSE NEURAL NETWORK [patent_app_type] => utility [patent_app_number] => 15/377858 [patent_app_country] => US [patent_app_date] => 2016-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15377858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/377858
LOW-POWER ARCHITECTURE FOR SPARSE NEURAL NETWORK Dec 12, 2016 Abandoned
Array ( [id] => 12628686 [patent_doc_number] => 20180101392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-12 [patent_title] => AUTO-CONFIGURABLE HOST PLUGGABLE COMPUTING [patent_app_type] => utility [patent_app_number] => 15/290325 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290325 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/290325
AUTO-CONFIGURABLE HOST PLUGGABLE COMPUTING Oct 10, 2016 Abandoned
Array ( [id] => 12628158 [patent_doc_number] => 20180101216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-12 [patent_title] => POWER MANAGEMENT AND UTILIZATION DETECTION OF COMPUTING COMPONENTS [patent_app_type] => utility [patent_app_number] => 15/289276 [patent_app_country] => US [patent_app_date] => 2016-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15289276 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/289276
Power management and utilization detection of computing components Oct 9, 2016 Issued
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