
Benjamin A. Schiffman
Examiner (ID: 12059)
| Most Active Art Unit | 1742 |
| Art Unit(s) | 1742, 1791, 4191 |
| Total Applications | 1236 |
| Issued Applications | 807 |
| Pending Applications | 77 |
| Abandoned Applications | 367 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 779212
[patent_doc_number] => 06995079
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-07
[patent_title] => 'Ion implantation method and method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/927535
[patent_app_country] => US
[patent_app_date] => 2004-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 1323
[patent_no_of_words] => 7391
[patent_no_of_claims] => 14
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[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/995/06995079.pdf
[firstpage_image] =>[orig_patent_app_number] => 10927535
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/927535 | Ion implantation method and method for manufacturing semiconductor device | Aug 26, 2004 | Issued |
Array
(
[id] => 7184254
[patent_doc_number] => 20040203226
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-14
[patent_title] => 'Semiconductor device with reduced interconnection capacity'
[patent_app_type] => new
[patent_app_number] => 10/833190
[patent_app_country] => US
[patent_app_date] => 2004-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
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[pdf_file] => publications/A1/0203/20040203226.pdf
[firstpage_image] =>[orig_patent_app_number] => 10833190
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/833190 | Semiconductor device with reduced interconnection capacity | Apr 27, 2004 | Issued |
Array
(
[id] => 938415
[patent_doc_number] => 06972244
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-12-06
[patent_title] => 'Marking semiconductor devices through a mount tape'
[patent_app_type] => utility
[patent_app_number] => 10/831390
[patent_app_country] => US
[patent_app_date] => 2004-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/06/972/06972244.pdf
[firstpage_image] =>[orig_patent_app_number] => 10831390
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/831390 | Marking semiconductor devices through a mount tape | Apr 22, 2004 | Issued |
Array
(
[id] => 7344214
[patent_doc_number] => 20040192014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-30
[patent_title] => 'Crystalline semiconductor film, method of manufacturing the same, and semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/822820
[patent_app_country] => US
[patent_app_date] => 2004-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 13520
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[pdf_file] => publications/A1/0192/20040192014.pdf
[firstpage_image] =>[orig_patent_app_number] => 10822820
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/822820 | Crystalline semiconductor film, method of manufacturing the same, and semiconductor device | Apr 12, 2004 | Issued |
Array
(
[id] => 7429246
[patent_doc_number] => 20040161896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-19
[patent_title] => '[STRUCTURE OF A MEMORY DEVICE AND FABRICATION METHOD THEREOF]'
[patent_app_type] => new
[patent_app_number] => 10/708210
[patent_app_country] => US
[patent_app_date] => 2004-02-17
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[pdf_file] => publications/A1/0161/20040161896.pdf
[firstpage_image] =>[orig_patent_app_number] => 10708210
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/708210 | Method of improving device resistance | Feb 16, 2004 | Issued |
Array
(
[id] => 7235488
[patent_doc_number] => 20040157435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-12
[patent_title] => 'Methods of forming metal lines in semiconductor devices'
[patent_app_type] => new
[patent_app_number] => 10/749650
[patent_app_country] => US
[patent_app_date] => 2003-12-30
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[pdf_file] => publications/A1/0157/20040157435.pdf
[firstpage_image] =>[orig_patent_app_number] => 10749650
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/749650 | Methods of forming metal lines in semiconductor devices | Dec 29, 2003 | Issued |
Array
(
[id] => 6918263
[patent_doc_number] => 20050095824
[patent_country] => US
[patent_kind] => A1
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[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => utility
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[pdf_file] => publications/A1/0095/20050095824.pdf
[firstpage_image] =>[orig_patent_app_number] => 10750359
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/750359 | Method for manufacturing semiconductor device | Dec 28, 2003 | Issued |
Array
(
[id] => 978951
[patent_doc_number] => 06929987
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-16
[patent_title] => 'Microelectronic device fabrication method'
[patent_app_type] => utility
[patent_app_number] => 10/746620
[patent_app_country] => US
[patent_app_date] => 2003-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/06/929/06929987.pdf
[firstpage_image] =>[orig_patent_app_number] => 10746620
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/746620 | Microelectronic device fabrication method | Dec 22, 2003 | Issued |
Array
(
[id] => 7284506
[patent_doc_number] => 20040145874
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-29
[patent_title] => 'Method, system, and apparatus for embedding circuits'
[patent_app_type] => new
[patent_app_number] => 10/735480
[patent_app_country] => US
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[pdf_file] => publications/A1/0145/20040145874.pdf
[firstpage_image] =>[orig_patent_app_number] => 10735480
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/735480 | Method, system, and apparatus for embedding circuits | Dec 11, 2003 | Abandoned |
Array
(
[id] => 7140030
[patent_doc_number] => 20050116254
[patent_country] => US
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[patent_issue_date] => 2005-06-02
[patent_title] => 'Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth'
[patent_app_type] => utility
[patent_app_number] => 10/725670
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[patent_app_date] => 2003-12-01
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[patent_drawing_sheets_cnt] => 14
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[pdf_file] => publications/A1/0116/20050116254.pdf
[firstpage_image] =>[orig_patent_app_number] => 10725670
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/725670 | Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth | Nov 30, 2003 | Issued |
Array
(
[id] => 941291
[patent_doc_number] => 06969682
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[patent_issue_date] => 2005-11-29
[patent_title] => 'Single workpiece processing system'
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[firstpage_image] =>[orig_patent_app_number] => 10693668
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/693668 | Single workpiece processing system | Oct 23, 2003 | Issued |
Array
(
[id] => 7300538
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/691688 | Single workpiece processing system | Oct 21, 2003 | Issued |
Array
(
[id] => 7368492
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/690864 | Single workpiece processing system | Oct 20, 2003 | Issued |
Array
(
[id] => 7344127
[patent_doc_number] => 20040191987
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[patent_issue_date] => 2004-09-30
[patent_title] => 'Method of forming nonvolatile memory device'
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[firstpage_image] =>[orig_patent_app_number] => 10682360
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/682360 | Method of forming nonvolatile memory device | Oct 6, 2003 | Issued |
Array
(
[id] => 7379913
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[patent_title] => 'Chip-type LED and process of manufacturing the same'
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Array
(
[id] => 1065616
[patent_doc_number] => 06846742
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[patent_issue_date] => 2005-01-25
[patent_title] => 'Si seasoning to reduce particles, extend clean frequency, block mobile ions and increase chamber throughput'
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[pdf_file] => patents/06/846/06846742.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/463703 | Si seasoning to reduce particles, extend clean frequency, block mobile ions and increase chamber throughput | Jun 15, 2003 | Issued |
Array
(
[id] => 1024533
[patent_doc_number] => 06884677
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[patent_issue_date] => 2005-04-26
[patent_title] => 'Recessed gate electrode MOS transistors having a substantially uniform channel length across a width of the recessed gate electrode and methods of forming same'
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Array
(
[id] => 7383559
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Array
(
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Array
(
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[patent_title] => 'Dielectric cure for reducing oxygen vacancies'
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[firstpage_image] =>[orig_patent_app_number] => 10443490
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/443490 | Dielectric cure for reducing oxygen vacancies | May 21, 2003 | Issued |