Benjamin A. Schiffman

Array ( [id] => 1595818 [patent_doc_number] => 06492284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Reactor for processing a workpiece using sonic energy' [patent_app_type] => B2 [patent_app_number] => 09/907552 [patent_app_country] => US [patent_app_date] => 2001-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1792 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492284.pdf [firstpage_image] =>[orig_patent_app_number] => 09907552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6027368 [patent_doc_number] => 20020017237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Apparatus for processing a workpiece' [patent_app_type] => new [patent_app_number] => 09/907522 [patent_app_country] => US [patent_app_date] => 2001-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7389 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20020017237.pdf [firstpage_image] =>[orig_patent_app_number] => 09907522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6454385 [patent_doc_number] => 20020020430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Reactor for processing a workpiece using sonic energy' [patent_app_type] => new [patent_app_number] => 09/907524 [patent_app_country] => US [patent_app_date] => 2001-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2346 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20020020430.pdf [firstpage_image] =>[orig_patent_app_number] => 09907524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1340062 [patent_doc_number] => 06589865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-08 [patent_title] => 'Low pressure, low temperature, semiconductor gap filling process' [patent_app_type] => B2 [patent_app_number] => 09/899194 [patent_app_country] => US [patent_app_date] => 2001-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5023 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/589/06589865.pdf [firstpage_image] =>[orig_patent_app_number] => 09899194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6755856 [patent_doc_number] => 20030003633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Apparatus and fabrication process to reduce crosstalk in pirm memory array' [patent_app_type] => new [patent_app_number] => 09/896480 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4048 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20030003633.pdf [firstpage_image] =>[orig_patent_app_number] => 09896480 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1059493 [patent_doc_number] => 06852583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Method for the production and configuration of organic field-effect transistors (OFET)' [patent_app_type] => utility [patent_app_number] => 10/332140 [patent_app_country] => US [patent_app_date] => 2001-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1182 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/852/06852583.pdf [firstpage_image] =>[orig_patent_app_number] => 10332140 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5787446 [patent_doc_number] => 20020160589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Semiconductor element and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/864940 [patent_app_country] => US [patent_app_date] => 2001-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2919 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20020160589.pdf [firstpage_image] =>[orig_patent_app_number] => 09864940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1264482 [patent_doc_number] => 06660615 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Method and apparatus for growing layer on one surface of wafer' [patent_app_type] => B1 [patent_app_number] => 09/859440 [patent_app_country] => US [patent_app_date] => 2001-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2709 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/660/06660615.pdf [firstpage_image] =>[orig_patent_app_number] => 09859440 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1306370 [patent_doc_number] => 06617174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-09 [patent_title] => 'Fieldless CMOS image sensor' [patent_app_type] => B2 [patent_app_number] => 09/849000 [patent_app_country] => US [patent_app_date] => 2001-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 32 [patent_no_of_words] => 5915 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617174.pdf [firstpage_image] =>[orig_patent_app_number] => 09849000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1581058 [patent_doc_number] => 06423590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-07-23 [patent_title] => 'High voltage transistor using P buried layer' [patent_app_type] => B2 [patent_app_number] => 09/846538 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2223 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423590.pdf [firstpage_image] =>[orig_patent_app_number] => 09846538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6880232 [patent_doc_number] => 20010031519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Electronic device manufacture' [patent_app_type] => new [patent_app_number] => 09/821130 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6469 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20010031519.pdf [firstpage_image] =>[orig_patent_app_number] => 09821130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6453402 [patent_doc_number] => 20020020344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Semiconductor manufacturing method, substrate processing method, and semiconductor manufacturing apparatus' [patent_app_type] => new [patent_app_number] => 09/819690 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7589 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20020020344.pdf [firstpage_image] =>[orig_patent_app_number] => 09819690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1366986 [patent_doc_number] => 06566198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-20 [patent_title] => 'CMOS structure with non-epitaxial raised source/drain and self-aligned gate and method of manufacture' [patent_app_type] => B2 [patent_app_number] => 09/821520 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 2837 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566198.pdf [firstpage_image] =>[orig_patent_app_number] => 09821520 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1053184 [patent_doc_number] => 06858512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Semiconductor device and method of producing the same' [patent_app_type] => utility [patent_app_number] => 09/820140 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 5637 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/858/06858512.pdf [firstpage_image] =>[orig_patent_app_number] => 09820140 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1216333 [patent_doc_number] => 06706553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Dispensing process for fabrication of microelectronic packages' [patent_app_type] => B2 [patent_app_number] => 09/817710 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 4600 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706553.pdf [firstpage_image] =>[orig_patent_app_number] => 09817710 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1381243 [patent_doc_number] => 06551854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-22 [patent_title] => 'Semiconductor device having bump electrodes and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/813160 [patent_app_country] => US [patent_app_date] => 2001-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3282 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/551/06551854.pdf [firstpage_image] =>[orig_patent_app_number] => 09813160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1401351 [patent_doc_number] => 06534351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-18 [patent_title] => 'Gate-controlled, graded-extension device for deep sub-micron ultra-high-performance devices' [patent_app_type] => B2 [patent_app_number] => 09/811730 [patent_app_country] => US [patent_app_date] => 2001-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3778 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534351.pdf [firstpage_image] =>[orig_patent_app_number] => 09811730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1366324 [patent_doc_number] => 06566149 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Method for manufacturing substrate for inspecting semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/787250 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 5574 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566149.pdf [firstpage_image] =>[orig_patent_app_number] => 09787250 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1340012 [patent_doc_number] => 06589860 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'System and method for calibrating electron beam defect inspection tool' [patent_app_type] => B1 [patent_app_number] => 09/811190 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2586 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/589/06589860.pdf [firstpage_image] =>[orig_patent_app_number] => 09811190 [rel_patent_id] =>[rel_patent_doc_number] =>)