Search

Benjamin E. Lanier

Examiner (ID: 11317, Phone: (571)272-3805 , Office: P/2437 )

Most Active Art Unit
2437
Art Unit(s)
2437, 2132, 2432
Total Applications
1337
Issued Applications
871
Pending Applications
110
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10028755 [patent_doc_number] => 09070664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Device with MOS device including a secondary metal and PVD tool with target for making same' [patent_app_type] => utility [patent_app_number] => 13/969370 [patent_app_country] => US [patent_app_date] => 2013-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13969370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/969370
Device with MOS device including a secondary metal and PVD tool with target for making same Aug 15, 2013 Issued
Array ( [id] => 9178491 [patent_doc_number] => 20130320475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'SEMICONDUCTOR APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS, METHOD OF DESIGNING SEMICONDUCTOR APPARATUS, AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/962711 [patent_app_country] => US [patent_app_date] => 2013-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 17815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13962711 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/962711
Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus Aug 7, 2013 Issued
Array ( [id] => 9148403 [patent_doc_number] => 20130302926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DICE BY SEPARATING A SUBSTRATE FROM SEMICONDUCTOR STRUCTURES USING MULTIPLE LASER PULSES' [patent_app_type] => utility [patent_app_number] => 13/936337 [patent_app_country] => US [patent_app_date] => 2013-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2765 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13936337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/936337
Method for fabricating semiconductor dice by separating a substrate from semiconductor structures using multiple laser pulses Jul 7, 2013 Issued
Array ( [id] => 9107709 [patent_doc_number] => 20130280841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/922795 [patent_app_country] => US [patent_app_date] => 2013-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 17555 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922795 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922795
Light emitting device and method of manufacturing the same Jun 19, 2013 Issued
Array ( [id] => 9104665 [patent_doc_number] => 20130277796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'ELECTRICAL FUSE AND METHOD OF MAKING' [patent_app_type] => utility [patent_app_number] => 13/919401 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3862 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919401
Electrical fuse and method of making Jun 16, 2013 Issued
Array ( [id] => 9094432 [patent_doc_number] => 20130273743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'WAFER BACKSIDE DEFECTIVITY CLEAN-UP UTILIZING SELECTIVE REMOVAL OF SUBSTRATE MATERIAL' [patent_app_type] => utility [patent_app_number] => 13/916098 [patent_app_country] => US [patent_app_date] => 2013-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4345 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13916098 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/916098
Wafer backside defectivity clean-up utilizing selective removal of substrate material Jun 11, 2013 Issued
Array ( [id] => 9091343 [patent_doc_number] => 20130270654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'SEMICONDUCTOR DEVICE WITH REDUCED CONTACT RESISTANCE AND METHOD OF MANUFACTURING THEREOF' [patent_app_type] => utility [patent_app_number] => 13/915221 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3688 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915221 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915221
Semiconductor device with reduced contact resistance and method of manufacturing thereof Jun 10, 2013 Issued
Array ( [id] => 9079010 [patent_doc_number] => 20130264540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'FABRICATION OF NONPOLAR INDIUM GALLIUM NITRIDE THIN FILMS, HETEROSTRUCTURES, AND DEVICES BY METALORGANIC CHEMICAL VAPOR DEPOSITION' [patent_app_type] => utility [patent_app_number] => 13/909775 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6816 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909775 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/909775
Fabrication of nonpolar indium gallium nitride thin films, heterostructures, and devices by metalorganic chemical vapor deposition Jun 3, 2013 Issued
Array ( [id] => 9477322 [patent_doc_number] => 20140134785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'SODIUM DOPED THIN FILM CIGS/CIGSS ABSORBER FOR HIGH EFFICIENCY PHOTOVOLTAIC DEVICES AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 13/857229 [patent_app_country] => US [patent_app_date] => 2013-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9741 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13857229 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/857229
Sodium doped thin film CIGS/CIGSS absorber for high efficiency photovoltaic devices and related methods Apr 4, 2013 Issued
Array ( [id] => 10883053 [patent_doc_number] => 08907435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Semiconductor memory and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/846397 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3871 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846397 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846397
Semiconductor memory and manufacturing method thereof Mar 17, 2013 Issued
Array ( [id] => 8989901 [patent_doc_number] => 20130217182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING PACKAGED MICROELECTRONIC DEVICES' [patent_app_type] => utility [patent_app_number] => 13/845686 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4683 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845686 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845686
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices Mar 17, 2013 Issued
Array ( [id] => 10086378 [patent_doc_number] => 09123733 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-01 [patent_title] => 'Integrated circuit packaging system with package underfill and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/844160 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 6787 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13844160 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/844160
Integrated circuit packaging system with package underfill and method of manufacture thereof Mar 14, 2013 Issued
Array ( [id] => 9850135 [patent_doc_number] => 08951863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Non-volatile memory (NVM) and logic integration' [patent_app_type] => utility [patent_app_number] => 13/780591 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5392 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13780591 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/780591
Non-volatile memory (NVM) and logic integration Feb 27, 2013 Issued
Array ( [id] => 9676752 [patent_doc_number] => 08815661 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-26 [patent_title] => 'MIM capacitor in FinFET structure' [patent_app_type] => utility [patent_app_number] => 13/768248 [patent_app_country] => US [patent_app_date] => 2013-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 2729 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13768248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/768248
MIM capacitor in FinFET structure Feb 14, 2013 Issued
Array ( [id] => 9965417 [patent_doc_number] => 09013033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Multiple die face-down stacking for two or more die' [patent_app_type] => utility [patent_app_number] => 13/741890 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 43 [patent_no_of_words] => 17821 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741890 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741890
Multiple die face-down stacking for two or more die Jan 14, 2013 Issued
Array ( [id] => 9850139 [patent_doc_number] => 08951867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'High density trench-based power MOSFETs with self-aligned active contacts and method for making such devices' [patent_app_type] => utility [patent_app_number] => 13/724228 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 6669 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 489 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724228 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/724228
High density trench-based power MOSFETs with self-aligned active contacts and method for making such devices Dec 20, 2012 Issued
Array ( [id] => 9762988 [patent_doc_number] => 08847317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Isolated epitaxial modulation device' [patent_app_type] => utility [patent_app_number] => 13/717917 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3341 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13717917 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/717917
Isolated epitaxial modulation device Dec 17, 2012 Issued
Array ( [id] => 10028832 [patent_doc_number] => 09070741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Method of manufacturing a semiconductor device and a semiconductor workpiece' [patent_app_type] => utility [patent_app_number] => 13/716967 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 5618 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716967 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/716967
Method of manufacturing a semiconductor device and a semiconductor workpiece Dec 16, 2012 Issued
Array ( [id] => 8788590 [patent_doc_number] => 20130105559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'CONDUCTIVE SIDEWALL FOR MICROBUMPS' [patent_app_type] => utility [patent_app_number] => 13/713822 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3700 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13713822 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/713822
CONDUCTIVE SIDEWALL FOR MICROBUMPS Dec 12, 2012 Abandoned
Array ( [id] => 10042064 [patent_doc_number] => 09082777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Method for encapsulating semiconductor and structure thereof' [patent_app_type] => utility [patent_app_number] => 13/710764 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2092 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710764 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/710764
Method for encapsulating semiconductor and structure thereof Dec 10, 2012 Issued
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