Search

Benjamin E. Lanier

Examiner (ID: 11317, Phone: (571)272-3805 , Office: P/2437 )

Most Active Art Unit
2437
Art Unit(s)
2437, 2132, 2432
Total Applications
1337
Issued Applications
871
Pending Applications
110
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5851247 [patent_doc_number] => 20060234438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Self-aligned contact for silicon-on-insulator devices' [patent_app_type] => utility [patent_app_number] => 11/454600 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3966 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20060234438.pdf [firstpage_image] =>[orig_patent_app_number] => 11454600 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/454600
Self-aligned contact for silicon-on-insulator devices Jun 15, 2006 Abandoned
Array ( [id] => 5659190 [patent_doc_number] => 20060249786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Alignment of trench for MOS' [patent_app_type] => utility [patent_app_number] => 11/408924 [patent_app_country] => US [patent_app_date] => 2006-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4842 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20060249786.pdf [firstpage_image] =>[orig_patent_app_number] => 11408924 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/408924
Alignment of trench for MOS Apr 23, 2006 Issued
Array ( [id] => 5848508 [patent_doc_number] => 20060231830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'DISPLAY DEVICE AND A METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/279930 [patent_app_country] => US [patent_app_date] => 2006-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6241 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20060231830.pdf [firstpage_image] =>[orig_patent_app_number] => 11279930 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279930
Display device and a method of manufacturing the same Apr 16, 2006 Issued
Array ( [id] => 889140 [patent_doc_number] => 07348653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Resistive memory cell, method for forming the same and resistive memory array using the same' [patent_app_type] => utility [patent_app_number] => 11/279640 [patent_app_country] => US [patent_app_date] => 2006-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 10755 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/348/07348653.pdf [firstpage_image] =>[orig_patent_app_number] => 11279640 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279640
Resistive memory cell, method for forming the same and resistive memory array using the same Apr 12, 2006 Issued
Array ( [id] => 872168 [patent_doc_number] => 07361591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Method of fabricating semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/279364 [patent_app_country] => US [patent_app_date] => 2006-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 7691 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/361/07361591.pdf [firstpage_image] =>[orig_patent_app_number] => 11279364 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279364
Method of fabricating semiconductor memory device Apr 10, 2006 Issued
Array ( [id] => 5677904 [patent_doc_number] => 20060183260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'P-type nitride semiconductor and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/395128 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11875 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20060183260.pdf [firstpage_image] =>[orig_patent_app_number] => 11395128 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/395128
P-type nitride semiconductor and method of manufacturing the same Apr 2, 2006 Abandoned
Array ( [id] => 5596369 [patent_doc_number] => 20060160286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Memory device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/385217 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4413 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20060160286.pdf [firstpage_image] =>[orig_patent_app_number] => 11385217 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385217
Memory device and method for fabricating the same Mar 19, 2006 Issued
Array ( [id] => 5869073 [patent_doc_number] => 20060163690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Semiconductor having thick dielectric regions' [patent_app_type] => utility [patent_app_number] => 11/384565 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3245 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163690.pdf [firstpage_image] =>[orig_patent_app_number] => 11384565 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/384565
Semiconductor having thick dielectric regions Mar 19, 2006 Issued
Array ( [id] => 481189 [patent_doc_number] => 07220324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'Technique for the growth of planar semi-polar gallium nitride' [patent_app_type] => utility [patent_app_number] => 11/372914 [patent_app_country] => US [patent_app_date] => 2006-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4833 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/220/07220324.pdf [firstpage_image] =>[orig_patent_app_number] => 11372914 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/372914
Technique for the growth of planar semi-polar gallium nitride Mar 9, 2006 Issued
Array ( [id] => 345035 [patent_doc_number] => 07498222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-03 [patent_title] => 'Enhanced etching of a high dielectric constant layer' [patent_app_type] => utility [patent_app_number] => 11/371024 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3516 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/498/07498222.pdf [firstpage_image] =>[orig_patent_app_number] => 11371024 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/371024
Enhanced etching of a high dielectric constant layer Mar 8, 2006 Issued
Array ( [id] => 5110458 [patent_doc_number] => 20070194373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'CMOS STRUCTURE AND METHOD INCLUDING MULTIPLE CRYSTALLOGRAPHIC PLANES' [patent_app_type] => utility [patent_app_number] => 11/276274 [patent_app_country] => US [patent_app_date] => 2006-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9210 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20070194373.pdf [firstpage_image] =>[orig_patent_app_number] => 11276274 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/276274
CMOS structure and method including multiple crystallographic planes Feb 21, 2006 Issued
Array ( [id] => 5645540 [patent_doc_number] => 20060131272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Particle-removing apparatus for a semiconductor device manufacturing apparatus and method of removing particles' [patent_app_type] => utility [patent_app_number] => 11/354506 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11292 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20060131272.pdf [firstpage_image] =>[orig_patent_app_number] => 11354506 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/354506
Particle-removing apparatus for a semiconductor device manufacturing apparatus and method of removing particles Feb 14, 2006 Abandoned
Array ( [id] => 904265 [patent_doc_number] => 07335927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Lateral silicided diodes' [patent_app_type] => utility [patent_app_number] => 11/275794 [patent_app_country] => US [patent_app_date] => 2006-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 33 [patent_no_of_words] => 5928 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/335/07335927.pdf [firstpage_image] =>[orig_patent_app_number] => 11275794 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275794
Lateral silicided diodes Jan 29, 2006 Issued
Array ( [id] => 4522913 [patent_doc_number] => 07951632 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-31 [patent_title] => 'Optical device and method of making' [patent_app_type] => utility [patent_app_number] => 11/340883 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 42 [patent_no_of_words] => 14635 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/951/07951632.pdf [firstpage_image] =>[orig_patent_app_number] => 11340883 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/340883
Optical device and method of making Jan 25, 2006 Issued
Array ( [id] => 5188688 [patent_doc_number] => 20070166997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Semiconductor devices and methods of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 11/334704 [patent_app_country] => US [patent_app_date] => 2006-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9030 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20070166997.pdf [firstpage_image] =>[orig_patent_app_number] => 11334704 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/334704
Semiconductor devices and methods of manufacture thereof Jan 17, 2006 Issued
Array ( [id] => 345047 [patent_doc_number] => 07498234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-03 [patent_title] => 'Method of producing a thin layer of semiconductor material' [patent_app_type] => utility [patent_app_number] => 11/327906 [patent_app_country] => US [patent_app_date] => 2006-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3654 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/498/07498234.pdf [firstpage_image] =>[orig_patent_app_number] => 11327906 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327906
Method of producing a thin layer of semiconductor material Jan 8, 2006 Issued
Array ( [id] => 132446 [patent_doc_number] => 07695985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Light exposure apparatus and manufacturing method of semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 10/582616 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 100 [patent_no_of_words] => 29534 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/695/07695985.pdf [firstpage_image] =>[orig_patent_app_number] => 10582616 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/582616
Light exposure apparatus and manufacturing method of semiconductor device using the same Dec 20, 2005 Issued
Array ( [id] => 861214 [patent_doc_number] => 07372072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Semiconductor wafer with test structure' [patent_app_type] => utility [patent_app_number] => 11/304074 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/372/07372072.pdf [firstpage_image] =>[orig_patent_app_number] => 11304074 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/304074
Semiconductor wafer with test structure Dec 14, 2005 Issued
Array ( [id] => 557807 [patent_doc_number] => 07470611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'In situ deposition of a low K dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application' [patent_app_type] => utility [patent_app_number] => 11/301063 [patent_app_country] => US [patent_app_date] => 2005-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 11748 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/470/07470611.pdf [firstpage_image] =>[orig_patent_app_number] => 11301063 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/301063
In situ deposition of a low K dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application Dec 11, 2005 Issued
Array ( [id] => 609465 [patent_doc_number] => 07151026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-19 [patent_title] => 'Semiconductor processing methods' [patent_app_type] => utility [patent_app_number] => 11/291508 [patent_app_country] => US [patent_app_date] => 2005-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2684 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/151/07151026.pdf [firstpage_image] =>[orig_patent_app_number] => 11291508 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/291508
Semiconductor processing methods Nov 30, 2005 Issued
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