Benjamin E. Lanier

Array ( [id] => 1270184 [patent_doc_number] => 06653202 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Method of shallow trench isolation (STI) formation using amorphous carbon' [patent_app_type] => B1 [patent_app_number] => 10/347064 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2608 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/653/06653202.pdf [firstpage_image] =>[orig_patent_app_number] => 10347064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6704356 [patent_doc_number] => 20030151090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Method of manufacturing power MOSFET device with reduced snap-back and being capable of increasing avalanche-breakdown current endurance' [patent_app_type] => new [patent_app_number] => 10/341884 [patent_app_country] => US [patent_app_date] => 2003-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2544 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20030151090.pdf [firstpage_image] =>[orig_patent_app_number] => 10341884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7388421 [patent_doc_number] => 20040016987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Semiconductor device with insulator and manufacturing method therefor' [patent_app_type] => new [patent_app_number] => 10/335943 [patent_app_country] => US [patent_app_date] => 2003-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16824 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20040016987.pdf [firstpage_image] =>[orig_patent_app_number] => 10335943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7465294 [patent_doc_number] => 20040053464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Process of forming a bottle-shaped trench' [patent_app_type] => new [patent_app_number] => 10/336083 [patent_app_country] => US [patent_app_date] => 2003-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2681 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20040053464.pdf [firstpage_image] =>[orig_patent_app_number] => 10336083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7675137 [patent_doc_number] => 20040126981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'MIM capacitors and methods for fabricating same' [patent_app_type] => new [patent_app_number] => 10/335333 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7815 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20040126981.pdf [firstpage_image] =>[orig_patent_app_number] => 10335333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1096017 [patent_doc_number] => 06821865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-23 [patent_title] => 'Deep isolation trenches' [patent_app_type] => B2 [patent_app_number] => 10/248233 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2430 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/821/06821865.pdf [firstpage_image] =>[orig_patent_app_number] => 10248233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7471509 [patent_doc_number] => 20040121555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'SHALLOW TRENCH ISOLATION PROCESS' [patent_app_type] => new [patent_app_number] => 10/248164 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2259 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20040121555.pdf [firstpage_image] =>[orig_patent_app_number] => 10248164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 482678 [patent_doc_number] => 07220657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device' [patent_app_type] => utility [patent_app_number] => 10/323645 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 7942 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/220/07220657.pdf [firstpage_image] =>[orig_patent_app_number] => 10323645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7471488 [patent_doc_number] => 20040121548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Methods of fabricating multiple sets of field effect transistors' [patent_app_type] => new [patent_app_number] => 10/323453 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2716 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20040121548.pdf [firstpage_image] =>[orig_patent_app_number] => 10323453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6783121 [patent_doc_number] => 20030064568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Device comprising electronic components in regions of a layer of semiconducting material insulated from each other and manufacturing process for such a device' [patent_app_type] => new [patent_app_number] => 10/313236 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3991 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20030064568.pdf [firstpage_image] =>[orig_patent_app_number] => 10313236 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1151592 [patent_doc_number] => 06767750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'Detection of AIOx ears for process control in FeRAM processing' [patent_app_type] => B2 [patent_app_number] => 10/308384 [patent_app_country] => US [patent_app_date] => 2002-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 20934 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/767/06767750.pdf [firstpage_image] =>[orig_patent_app_number] => 10308384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6701699 [patent_doc_number] => 20030224579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Method of manufacturing semiconductor device with shallow trench isolation' [patent_app_type] => new [patent_app_number] => 10/303874 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2749 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20030224579.pdf [firstpage_image] =>[orig_patent_app_number] => 10303874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6671965 [patent_doc_number] => 20030057568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Flip chip type semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/292201 [patent_app_country] => US [patent_app_date] => 2002-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9358 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057568.pdf [firstpage_image] =>[orig_patent_app_number] => 10292201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7203842 [patent_doc_number] => 20040087104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Method of forming shallow trench isolation structure in a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/278294 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2587 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20040087104.pdf [firstpage_image] =>[orig_patent_app_number] => 10278294 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1253350 [patent_doc_number] => 06670253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'Fabrication method for punch-through defect resistant semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/265723 [patent_app_country] => US [patent_app_date] => 2002-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2210 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670253.pdf [firstpage_image] =>[orig_patent_app_number] => 10265723 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7280860 [patent_doc_number] => 20040063237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Fabricating complex micro-electromechanical systems using a dummy handling substrate' [patent_app_type] => new [patent_app_number] => 10/259174 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4539 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20040063237.pdf [firstpage_image] =>[orig_patent_app_number] => 10259174 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6742914 [patent_doc_number] => 20030020097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Memory device with divided bit-line architecture' [patent_app_type] => new [patent_app_number] => 10/246834 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4024 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20030020097.pdf [firstpage_image] =>[orig_patent_app_number] => 10246834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1202689 [patent_doc_number] => 06720235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Method of forming shallow trench isolation in a semiconductor substrate' [patent_app_type] => B2 [patent_app_number] => 10/237693 [patent_app_country] => US [patent_app_date] => 2002-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1535 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720235.pdf [firstpage_image] =>[orig_patent_app_number] => 10237693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6750539 [patent_doc_number] => 20030045059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Method for fabricating a silicide layer of flat cell memory' [patent_app_type] => new [patent_app_number] => 10/235773 [patent_app_country] => US [patent_app_date] => 2002-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2603 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20030045059.pdf [firstpage_image] =>[orig_patent_app_number] => 10235773 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7135175 [patent_doc_number] => 20040043579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'MRAM MTJ stack to conductive line alignment method' [patent_app_type] => new [patent_app_number] => 10/234864 [patent_app_country] => US [patent_app_date] => 2002-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5560 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20040043579.pdf [firstpage_image] =>[orig_patent_app_number] => 10234864 [rel_patent_id] =>[rel_patent_doc_number] =>)