Benjamin F. Fiorello

Array ( [id] => 702034 [patent_doc_number] => 07073018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-04 [patent_title] => 'Device identification method for systems having multiple device branches' [patent_app_type] => utility [patent_app_number] => 10/331673 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 28 [patent_no_of_words] => 8873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/073/07073018.pdf [firstpage_image] =>[orig_patent_app_number] => 10331673 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 761850 [patent_doc_number] => 07020760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Hybrid logical block virtualization system for a storage area network' [patent_app_type] => utility [patent_app_number] => 10/320318 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/020/07020760.pdf [firstpage_image] =>[orig_patent_app_number] => 10320318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 633362 [patent_doc_number] => 07133995 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-07 [patent_title] => 'Dynamic page conflict prediction for DRAM' [patent_app_type] => utility [patent_app_number] => 10/320034 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8293 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/133/07133995.pdf [firstpage_image] =>[orig_patent_app_number] => 10320034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 933327 [patent_doc_number] => 06981099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Smart-prefetch' [patent_app_type] => utility [patent_app_number] => 10/320284 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7089 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981099.pdf [firstpage_image] =>[orig_patent_app_number] => 10320284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 407154 [patent_doc_number] => 07290105 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-30 [patent_title] => 'Zero overhead resource locks with attributes' [patent_app_type] => utility [patent_app_number] => 10/320120 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 8765 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/290/07290105.pdf [firstpage_image] =>[orig_patent_app_number] => 10320120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7608134 [patent_doc_number] => 07000066 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-14 [patent_title] => 'Priority encoder circuit for content addressable memory (CAM) device' [patent_app_type] => utility [patent_app_number] => 10/320053 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5203 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/000/07000066.pdf [firstpage_image] =>[orig_patent_app_number] => 10320053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 451096 [patent_doc_number] => 07254687 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-08-07 [patent_title] => 'Memory controller that tracks queue operations to detect race conditions' [patent_app_type] => utility [patent_app_number] => 10/320162 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5251 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/254/07254687.pdf [firstpage_image] =>[orig_patent_app_number] => 10320162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 852029 [patent_doc_number] => 07383387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Document transformation tool' [patent_app_type] => utility [patent_app_number] => 10/319385 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4905 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/383/07383387.pdf [firstpage_image] =>[orig_patent_app_number] => 10319385 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7293108 [patent_doc_number] => 20040111446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Combining entries in a card object table' [patent_app_type] => new [patent_app_number] => 10/309909 [patent_app_country] => US [patent_app_date] => 2002-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15782 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20040111446.pdf [firstpage_image] =>[orig_patent_app_number] => 10309909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 563454 [patent_doc_number] => 07167954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'System and method for caching' [patent_app_type] => utility [patent_app_number] => 10/294091 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5653 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/167/07167954.pdf [firstpage_image] =>[orig_patent_app_number] => 10294091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7360625 [patent_doc_number] => 20040049640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'System and method for directional prefetching' [patent_app_type] => new [patent_app_number] => 10/294415 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6086 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20040049640.pdf [firstpage_image] =>[orig_patent_app_number] => 10294415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6802354 [patent_doc_number] => 20030097519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Memory subsystem' [patent_app_type] => new [patent_app_number] => 10/293366 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3191 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20030097519.pdf [firstpage_image] =>[orig_patent_app_number] => 10293366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 958110 [patent_doc_number] => 06957306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'System and method for controlling prefetching' [patent_app_type] => utility [patent_app_number] => 10/294539 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5544 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/957/06957306.pdf [firstpage_image] =>[orig_patent_app_number] => 10294539 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7603639 [patent_doc_number] => 07117300 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-03 [patent_title] => 'Method and apparatus for restricted search operation in content addressable memory (CAM) devices' [patent_app_type] => utility [patent_app_number] => 10/281814 [patent_app_country] => US [patent_app_date] => 2002-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 40 [patent_no_of_words] => 16768 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/117/07117300.pdf [firstpage_image] =>[orig_patent_app_number] => 10281814 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6868755 [patent_doc_number] => 20030081444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Information containing means for memory modules and memory chips' [patent_app_type] => new [patent_app_number] => 10/278232 [patent_app_country] => US [patent_app_date] => 2002-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1569 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20030081444.pdf [firstpage_image] =>[orig_patent_app_number] => 10278232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 237675 [patent_doc_number] => 07596664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-29 [patent_title] => 'Collapsed distributed cooperative memory for interactive and scalable media-on-demand systems' [patent_app_type] => utility [patent_app_number] => 10/508433 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6889 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/596/07596664.pdf [firstpage_image] =>[orig_patent_app_number] => 10508433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7107220 [patent_doc_number] => 20050108488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Programme-controlled unit' [patent_app_type] => utility [patent_app_number] => 10/490230 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20050108488.pdf [firstpage_image] =>[orig_patent_app_number] => 10490230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7138394 [patent_doc_number] => 20040044833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'System and method for optimizing interconnections of memory devices in a multichip module' [patent_app_type] => new [patent_app_number] => 10/232842 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4307 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20040044833.pdf [firstpage_image] =>[orig_patent_app_number] => 10232842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 757619 [patent_doc_number] => 07024519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'Methods and apparatus for controlling hierarchical cache memory' [patent_app_type] => utility [patent_app_number] => 10/228347 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 11046 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/024/07024519.pdf [firstpage_image] =>[orig_patent_app_number] => 10228347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7404688 [patent_doc_number] => 20040039883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Modified persistent auto precharge command protocol system and method for memory devices' [patent_app_type] => new [patent_app_number] => 10/228781 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6832 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20040039883.pdf [firstpage_image] =>[orig_patent_app_number] => 10228781 [rel_patent_id] =>[rel_patent_doc_number] =>)