Benjamin Huh
Examiner (ID: 13158)
Most Active Art Unit | 3767 |
Art Unit(s) | 3767 |
Total Applications | 67 |
Issued Applications | 18 |
Pending Applications | 4 |
Abandoned Applications | 45 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 10194803
[patent_doc_number] => 09223714
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-29
[patent_title] => 'Instruction boundary prediction for variable length instruction set'
[patent_app_type] => utility
[patent_app_number] => 13/836374
[patent_app_country] => US
[patent_app_date] => 2013-03-15
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13836374
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/836374 | Instruction boundary prediction for variable length instruction set | Mar 14, 2013 | Issued |
Array
(
[id] => 10596331
[patent_doc_number] => 09317419
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-04-19
[patent_title] => 'System and method for thin provisioning'
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[patent_app_number] => 13/837063
[patent_app_country] => US
[patent_app_date] => 2013-03-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/837063 | System and method for thin provisioning | Mar 14, 2013 | Issued |
Array
(
[id] => 10117456
[patent_doc_number] => 09152339
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-10-06
[patent_title] => 'Synchronization of asymmetric active-active, asynchronously-protected storage'
[patent_app_type] => utility
[patent_app_number] => 13/836095
[patent_app_country] => US
[patent_app_date] => 2013-03-15
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[patent_drawing_sheets_cnt] => 12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/836095 | Synchronization of asymmetric active-active, asynchronously-protected storage | Mar 14, 2013 | Issued |
Array
(
[id] => 8965482
[patent_doc_number] => 20130205084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-08
[patent_title] => 'STRIDE BASED FREE SPACE MANAGEMENT ON COMPRESSED VOLUMES'
[patent_app_type] => utility
[patent_app_number] => 13/791486
[patent_app_country] => US
[patent_app_date] => 2013-03-08
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13791486
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/791486 | Stride based free space management on compressed volumes | Mar 7, 2013 | Issued |
Array
(
[id] => 10854130
[patent_doc_number] => 08880840
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-04
[patent_title] => 'Writing adjacent tracks to a stride, based on a comparison of a destaging of tracks to a defragmentation of the stride'
[patent_app_type] => utility
[patent_app_number] => 13/787696
[patent_app_country] => US
[patent_app_date] => 2013-03-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/787696 | Writing adjacent tracks to a stride, based on a comparison of a destaging of tracks to a defragmentation of the stride | Mar 5, 2013 | Issued |
Array
(
[id] => 10144066
[patent_doc_number] => 09176875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-03
[patent_title] => 'Power gating a portion of a cache memory'
[patent_app_type] => utility
[patent_app_number] => 13/785228
[patent_app_country] => US
[patent_app_date] => 2013-03-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/785228 | Power gating a portion of a cache memory | Mar 4, 2013 | Issued |
Array
(
[id] => 8893689
[patent_doc_number] => 20130166873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-27
[patent_title] => 'MANAGEMENT OF LOW-PAGING SPACE CONDITIONS IN AN OPERATING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/774362
[patent_app_country] => US
[patent_app_date] => 2013-02-22
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13774362
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/774362 | Management of low-paging space conditions in an operating system | Feb 21, 2013 | Issued |
Array
(
[id] => 8886438
[patent_doc_number] => 20130159622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'CHAINED, SCALABLE STORAGE DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/765253
[patent_app_country] => US
[patent_app_date] => 2013-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13765253
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/765253 | CHAINED, SCALABLE STORAGE DEVICES | Feb 11, 2013 | Abandoned |
Array
(
[id] => 9637042
[patent_doc_number] => 20140215151
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-31
[patent_title] => 'STORAGE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 14/004715
[patent_app_country] => US
[patent_app_date] => 2013-01-29
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14004715
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/004715 | Storage system | Jan 28, 2013 | Issued |
Array
(
[id] => 9637065
[patent_doc_number] => 20140215174
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-31
[patent_title] => 'Accessing Memory with Security Functionality'
[patent_app_type] => utility
[patent_app_number] => 13/750466
[patent_app_country] => US
[patent_app_date] => 2013-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13750466
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/750466 | Accessing Memory with Security Functionality | Jan 24, 2013 | Abandoned |
Array
(
[id] => 10630624
[patent_doc_number] => 09348774
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-24
[patent_title] => 'Controller-opaque communication with non-volatile memory devices'
[patent_app_type] => utility
[patent_app_number] => 13/750200
[patent_app_country] => US
[patent_app_date] => 2013-01-25
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13750200
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/750200 | Controller-opaque communication with non-volatile memory devices | Jan 24, 2013 | Issued |
Array
(
[id] => 9637038
[patent_doc_number] => 20140215147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-31
[patent_title] => 'RAID STORAGE REBUILD PROCESSING'
[patent_app_type] => utility
[patent_app_number] => 13/750896
[patent_app_country] => US
[patent_app_date] => 2013-01-25
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13750896
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/750896 | RAID STORAGE REBUILD PROCESSING | Jan 24, 2013 | Abandoned |
Array
(
[id] => 9207510
[patent_doc_number] => 20140006687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-02
[patent_title] => 'Data Cache Apparatus, Data Storage System and Method'
[patent_app_type] => utility
[patent_app_number] => 13/740854
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/740854 | Data Cache Apparatus, Data Storage System and Method | Jan 13, 2013 | Abandoned |
Array
(
[id] => 10171083
[patent_doc_number] => 09201791
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-01
[patent_title] => 'Flow-ID dependency checking logic'
[patent_app_type] => utility
[patent_app_number] => 13/736245
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/736245 | Flow-ID dependency checking logic | Jan 7, 2013 | Issued |
Array
(
[id] => 8816458
[patent_doc_number] => 20130117503
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-09
[patent_title] => 'SERVICING NON-BLOCK STORAGE REQUESTS'
[patent_app_type] => utility
[patent_app_number] => 13/730466
[patent_app_country] => US
[patent_app_date] => 2012-12-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/730466 | Servicing non-block storage requests | Dec 27, 2012 | Issued |
Array
(
[id] => 10150853
[patent_doc_number] => 09183144
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-10
[patent_title] => 'Power gating a portion of a cache memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715613 | Power gating a portion of a cache memory | Dec 13, 2012 | Issued |
Array
(
[id] => 9548571
[patent_doc_number] => 20140173218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'CROSS DEPENDENCY CHECKING LOGIC'
[patent_app_type] => utility
[patent_app_number] => 13/715623
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715623 | Cross dependency checking logic | Dec 13, 2012 | Issued |
Array
(
[id] => 10508260
[patent_doc_number] => 09236136
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-12
[patent_title] => 'Lower page read for multi-level cell memory'
[patent_app_type] => utility
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/714763 | Lower page read for multi-level cell memory | Dec 13, 2012 | Issued |
Array
(
[id] => 10177878
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[patent_title] => 'Hardware-supported per-process metadata tags'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/712878 | Hardware-supported per-process metadata tags | Dec 11, 2012 | Issued |
Array
(
[id] => 9320584
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[patent_title] => 'RANDOM ACCESS OF A CACHE PORTION USING AN ACCESS MODULE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/690888 | Random access of a cache portion using an access module | Nov 29, 2012 | Issued |