Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 3566911
[patent_doc_number] => 05500941
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-19
[patent_title] => 'Optimum functional test method to determine the quality of a software system embedded in a large electronic system'
[patent_app_type] => 1
[patent_app_number] => 8/271422
[patent_app_country] => US
[patent_app_date] => 1994-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4525
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 296
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/500/05500941.pdf
[firstpage_image] =>[orig_patent_app_number] => 271422
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/271422 | Optimum functional test method to determine the quality of a software system embedded in a large electronic system | Jul 5, 1994 | Issued |
Array
(
[id] => 3486358
[patent_doc_number] => 05432794
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-11
[patent_title] => 'Automatic Equalizer'
[patent_app_type] => 1
[patent_app_number] => 8/268725
[patent_app_country] => US
[patent_app_date] => 1994-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3751
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/432/05432794.pdf
[firstpage_image] =>[orig_patent_app_number] => 268725
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/268725 | Automatic Equalizer | Jun 29, 1994 | Issued |
08/268132 | METHOD AND SYSTEM FOR IDENTIFICATION OF SOFTWARE APPLICATION FAULTS | Jun 28, 1994 | Abandoned |
Array
(
[id] => 3854614
[patent_doc_number] => 05848073
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-08
[patent_title] => 'Method and apparatus for predicting transmission system errors and failures'
[patent_app_type] => 1
[patent_app_number] => 8/263903
[patent_app_country] => US
[patent_app_date] => 1994-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 3340
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/848/05848073.pdf
[firstpage_image] =>[orig_patent_app_number] => 263903
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/263903 | Method and apparatus for predicting transmission system errors and failures | Jun 19, 1994 | Issued |
08/260122 | SPECIAL CODE DOWNLOAD INTERFACE | Jun 14, 1994 | Abandoned |
Array
(
[id] => 3639734
[patent_doc_number] => 05621889
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Facility for detecting intruders and suspect callers in a computer installation and a security system including such a facility'
[patent_app_type] => 1
[patent_app_number] => 8/257052
[patent_app_country] => US
[patent_app_date] => 1994-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9005
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 439
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/621/05621889.pdf
[firstpage_image] =>[orig_patent_app_number] => 257052
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/257052 | Facility for detecting intruders and suspect callers in a computer installation and a security system including such a facility | Jun 7, 1994 | Issued |
08/248849 | FILTERED SIGNAL VALIDATION | May 24, 1994 | Abandoned |
Array
(
[id] => 3530008
[patent_doc_number] => 05577199
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-19
[patent_title] => 'Majority circuit, a controller and a majority LSI'
[patent_app_type] => 1
[patent_app_number] => 8/243362
[patent_app_country] => US
[patent_app_date] => 1994-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 34
[patent_no_of_words] => 12493
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/577/05577199.pdf
[firstpage_image] =>[orig_patent_app_number] => 243362
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/243362 | Majority circuit, a controller and a majority LSI | May 15, 1994 | Issued |
08/235652 | DATA TRANSMISSIONS SYSTEM HAVING BACKUP TESTING FACILITY | Apr 28, 1994 | Abandoned |
08/233862 | MULTIPLE POWER DOMAIN POWER LOSS DETECTION AND INTERFACE DISABLE | Apr 25, 1994 | Abandoned |
Array
(
[id] => 3499816
[patent_doc_number] => 05471487
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-28
[patent_title] => 'Stack read/write counter through checking'
[patent_app_type] => 1
[patent_app_number] => 8/233232
[patent_app_country] => US
[patent_app_date] => 1994-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5718
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/471/05471487.pdf
[firstpage_image] =>[orig_patent_app_number] => 233232
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/233232 | Stack read/write counter through checking | Apr 25, 1994 | Issued |
08/230932 | SEMICONDUCTOR INTEGRATED CIRCUIT FOR DEVELOPING A SYSTEM USING A MICROPROCESSOR | Apr 20, 1994 | Abandoned |
Array
(
[id] => 3700344
[patent_doc_number] => 05644709
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-01
[patent_title] => 'Method for detecting computer memory access errors'
[patent_app_type] => 1
[patent_app_number] => 8/237041
[patent_app_country] => US
[patent_app_date] => 1994-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 18475
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/644/05644709.pdf
[firstpage_image] =>[orig_patent_app_number] => 237041
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/237041 | Method for detecting computer memory access errors | Apr 20, 1994 | Issued |
Array
(
[id] => 3458392
[patent_doc_number] => 05421006
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-30
[patent_title] => 'Method and apparatus for assessing integrity of computer system software'
[patent_app_type] => 1
[patent_app_number] => 8/231443
[patent_app_country] => US
[patent_app_date] => 1994-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 12311
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 284
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/421/05421006.pdf
[firstpage_image] =>[orig_patent_app_number] => 231443
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/231443 | Method and apparatus for assessing integrity of computer system software | Apr 19, 1994 | Issued |
Array
(
[id] => 3432121
[patent_doc_number] => 05479612
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-26
[patent_title] => 'Automated system and method to discourage access of unlicensed peripheral devices by a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/226922
[patent_app_country] => US
[patent_app_date] => 1994-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2840
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/479/05479612.pdf
[firstpage_image] =>[orig_patent_app_number] => 226922
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/226922 | Automated system and method to discourage access of unlicensed peripheral devices by a computer system | Apr 12, 1994 | Issued |
Array
(
[id] => 3535484
[patent_doc_number] => 05504761
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-02
[patent_title] => 'Apparatus for detecting error in a communications line'
[patent_app_type] => 1
[patent_app_number] => 8/222482
[patent_app_country] => US
[patent_app_date] => 1994-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4235
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/504/05504761.pdf
[firstpage_image] =>[orig_patent_app_number] => 222482
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/222482 | Apparatus for detecting error in a communications line | Apr 4, 1994 | Issued |
08/223252 | GRAPHICAL PASSWORD | Apr 3, 1994 | Abandoned |
Array
(
[id] => 3470137
[patent_doc_number] => 05442641
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-15
[patent_title] => 'Fast data compression circuit for semiconductor memory chips including an array built-in self-test structure'
[patent_app_type] => 1
[patent_app_number] => 8/223072
[patent_app_country] => US
[patent_app_date] => 1994-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5944
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 309
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/442/05442641.pdf
[firstpage_image] =>[orig_patent_app_number] => 223072
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/223072 | Fast data compression circuit for semiconductor memory chips including an array built-in self-test structure | Apr 3, 1994 | Issued |
08/221072 | RECOVERABLE SET ASSOCIATIVE CACHE | Mar 30, 1994 | Abandoned |
08/220422 | INFORMATION PROCESSING SYSTEM | Mar 29, 1994 | Abandoned |