Benjamin T. Liu

Array ( [id] => 8937383 [patent_doc_number] => 20130187180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'LIGHT EMITTING DIODE FOR PLANT GROWTH' [patent_app_type] => utility [patent_app_number] => 13/356656 [patent_app_country] => US [patent_app_date] => 2012-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 1845 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10118654 [patent_doc_number] => 09153543 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-06 [patent_title] => 'Shielding technique for semiconductor package including metal lid and metalized contact area' [patent_app_type] => utility [patent_app_number] => 13/356330 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5106 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8937440 [patent_doc_number] => 20130187237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'STRUCTURE AND METHOD FOR TRANSISTOR WITH LINE END EXTENSION' [patent_app_type] => utility [patent_app_number] => 13/356235 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6094 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8937450 [patent_doc_number] => 20130187247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'MULTI-BIT MAGNETIC TUNNEL JUNCTION MEMORY AND METHOD OF FORMING SAME' [patent_app_type] => utility [patent_app_number] => 13/356530 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4347 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8310375 [patent_doc_number] => 20120187396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/355950 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 35309 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13355950 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10645335 [patent_doc_number] => 09362209 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'Shielding technique for semiconductor package including metal lid' [patent_app_type] => utility [patent_app_number] => 13/356349 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5516 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8705306 [patent_doc_number] => 20130062595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'PHOTODIODE' [patent_app_type] => utility [patent_app_number] => 13/354980 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4598 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354980 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8192681 [patent_doc_number] => 20120119179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/354380 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9483 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119179.pdf [firstpage_image] =>[orig_patent_app_number] => 13354380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8210141 [patent_doc_number] => 20120129276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => '4D Process and Structure' [patent_app_type] => utility [patent_app_number] => 13/353183 [patent_app_country] => US [patent_app_date] => 2012-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 12817 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20120129276.pdf [firstpage_image] =>[orig_patent_app_number] => 13353183 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11233965 [patent_doc_number] => 09461202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'High-efficiency light-emitting device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/310255 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4346 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13310255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8049401 [patent_doc_number] => 20120074418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/298469 [patent_app_country] => US [patent_app_date] => 2011-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 16504 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074418.pdf [firstpage_image] =>[orig_patent_app_number] => 13298469 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8743047 [patent_doc_number] => 20130082764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'APPARATUS AND METHOD TO COMBINE PIN FUNCTIONALITY IN AN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/250677 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13250677 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7720641 [patent_doc_number] => 20120009976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'RECESS GATE TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/242724 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5840 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20120009976.pdf [firstpage_image] =>[orig_patent_app_number] => 13242724 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7716946 [patent_doc_number] => 20120007075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'SEMICONDUCTOR CHIP WITH BACKSIDE CONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/239872 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5506 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007075.pdf [firstpage_image] =>[orig_patent_app_number] => 13239872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7783179 [patent_doc_number] => 20120044735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'STRUCTURES WITH INCREASED PHOTO-ALIGNMENT MARGINS' [patent_app_type] => utility [patent_app_number] => 13/233609 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 10795 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20120044735.pdf [firstpage_image] =>[orig_patent_app_number] => 13233609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7711211 [patent_doc_number] => 20120003792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'STACKED DIE PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/231953 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2998 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13231953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7656934 [patent_doc_number] => 20110306203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'INTERCONNECT STRUCTURE AND METHOD OF MANUFACTURING A DAMASCENE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/218035 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20110306203.pdf [firstpage_image] =>[orig_patent_app_number] => 13218035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7558944 [patent_doc_number] => 20110272775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => '3D INTEGRATED CIRCUIT SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/183373 [patent_app_country] => US [patent_app_date] => 2011-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2458 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272775.pdf [firstpage_image] =>[orig_patent_app_number] => 13183373 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8071931 [patent_doc_number] => 20110241057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'HIGH-EFFICIENCY LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/161835 [patent_app_country] => US [patent_app_date] => 2011-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2107 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241057.pdf [firstpage_image] =>[orig_patent_app_number] => 13161835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7488956 [patent_doc_number] => 20110237008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'OPTOELECTRONIC SUBSTRATE AND METHODS OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 13/154510 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5492 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20110237008.pdf [firstpage_image] =>[orig_patent_app_number] => 13154510 [rel_patent_id] =>[rel_patent_doc_number] =>)