![](/images/general/no_picture/200_user.png)
Benyam Haile
Examiner (ID: 2511, Phone: (571)272-2080 , Office: P/2686 )
Most Active Art Unit | 2688 |
Art Unit(s) | 2681, 2688, 2686 |
Total Applications | 715 |
Issued Applications | 415 |
Pending Applications | 88 |
Abandoned Applications | 212 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 17145408
[patent_doc_number] => 20210313421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => SIGNAL ISOLATION APPARATUS AND SIGNAL ISOLATION METHOD
[patent_app_type] => utility
[patent_app_number] => 17/353248
[patent_app_country] => US
[patent_app_date] => 2021-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5899
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353248
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/353248 | SIGNAL ISOLATION APPARATUS AND SIGNAL ISOLATION METHOD | Jun 20, 2021 | Pending |
Array
(
[id] => 17295579
[patent_doc_number] => 20210391418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-16
[patent_title] => SUPER JUNCTION POWER DEVICE AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/345472
[patent_app_country] => US
[patent_app_date] => 2021-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12576
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 336
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345472
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/345472 | SUPER JUNCTION POWER DEVICE AND METHOD OF MAKING THE SAME | Jun 10, 2021 | Pending |
Array
(
[id] => 17130362
[patent_doc_number] => 20210305131
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/346186
[patent_app_country] => US
[patent_app_date] => 2021-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4899
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346186
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/346186 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | Jun 10, 2021 | Pending |
Array
(
[id] => 17130663
[patent_doc_number] => 20210305432
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/345546
[patent_app_country] => US
[patent_app_date] => 2021-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14697
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345546
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/345546 | SEMICONDUCTOR DEVICE | Jun 10, 2021 | Pending |
Array
(
[id] => 17115795
[patent_doc_number] => 20210296392
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => Flat Panel Array with the Alignment Marks in Active Area
[patent_app_type] => utility
[patent_app_number] => 17/339736
[patent_app_country] => US
[patent_app_date] => 2021-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3563
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339736
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/339736 | Flat Panel Array with the Alignment Marks in Active Area | Jun 3, 2021 | Pending |
Array
(
[id] => 17855160
[patent_doc_number] => 20220285203
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => DOUBLE PATTERNING TECHNIQUES FOR FORMING A DEEP TRENCH ISOLATION STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/303524
[patent_app_country] => US
[patent_app_date] => 2021-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15588
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303524
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/303524 | DOUBLE PATTERNING TECHNIQUES FOR FORMING A DEEP TRENCH ISOLATION STRUCTURE | May 31, 2021 | Pending |
Array
(
[id] => 18595193
[patent_doc_number] => 11744115
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-29
[patent_title] => Pixel defining layer having column portions in a space between two adjacent columns of subpixel apertures and spacing apart by multiple pairs of adjacent row portions respectively in multiple rows
[patent_app_type] => utility
[patent_app_number] => 17/322055
[patent_app_country] => US
[patent_app_date] => 2021-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 26
[patent_no_of_words] => 9435
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322055
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/322055 | Pixel defining layer having column portions in a space between two adjacent columns of subpixel apertures and spacing apart by multiple pairs of adjacent row portions respectively in multiple rows | May 16, 2021 | Issued |
Array
(
[id] => 17855442
[patent_doc_number] => 20220285485
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => SCHOTTKY BARRIER DIODE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/317576
[patent_app_country] => US
[patent_app_date] => 2021-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4049
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317576
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/317576 | SCHOTTKY BARRIER DIODE AND METHOD FOR MANUFACTURING THE SAME | May 10, 2021 | Pending |
Array
(
[id] => 17263076
[patent_doc_number] => 20210376061
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => POWER MOSFET WITH REDUCED CURRENT LEAKAGE AND METHOD OF FABRICATING THE POWER MOSFET
[patent_app_type] => utility
[patent_app_number] => 17/236149
[patent_app_country] => US
[patent_app_date] => 2021-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4567
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17236149
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/236149 | POWER MOSFET WITH REDUCED CURRENT LEAKAGE AND METHOD OF FABRICATING THE POWER MOSFET | Apr 20, 2021 | Pending |
Array
(
[id] => 16995672
[patent_doc_number] => 20210234092
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-29
[patent_title] => Reduction of Barrier Resistance X Area (RA) Product and Protection of Perpendicular Magnetic Anisotropy (PMA) for Magnetic Device Applications
[patent_app_type] => utility
[patent_app_number] => 17/230605
[patent_app_country] => US
[patent_app_date] => 2021-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11663
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230605
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/230605 | Reduction of Barrier Resistance X Area (RA) Product and Protection of Perpendicular Magnetic Anisotropy (PMA) for Magnetic Device Applications | Apr 13, 2021 | Pending |
Array
(
[id] => 17901025
[patent_doc_number] => 20220310687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => PIXEL SENSOR INCLUDING A TRANSFER FINFET
[patent_app_type] => utility
[patent_app_number] => 17/214329
[patent_app_country] => US
[patent_app_date] => 2021-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12709
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17214329
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/214329 | PIXEL SENSOR INCLUDING A TRANSFER FINFET | Mar 25, 2021 | Pending |
Array
(
[id] => 17232559
[patent_doc_number] => 20210359116
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => SEMICONDUCTOR APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/210492
[patent_app_country] => US
[patent_app_date] => 2021-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9382
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17210492
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/210492 | SEMICONDUCTOR APPARATUS | Mar 22, 2021 | Pending |
Array
(
[id] => 17917700
[patent_doc_number] => 20220320096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => CAPACITOR ARRAY STRUCTURE AND PREPARATION METHOD THEREOF AND SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/310799
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4928
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17310799
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/310799 | CAPACITOR ARRAY STRUCTURE AND PREPARATION METHOD THEREOF AND SEMICONDUCTOR MEMORY DEVICE | Mar 14, 2021 | Pending |
Array
(
[id] => 16966346
[patent_doc_number] => 20210217845
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-15
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/198807
[patent_app_country] => US
[patent_app_date] => 2021-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6197
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198807
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/198807 | SEMICONDUCTOR DEVICE | Mar 10, 2021 | Pending |
Array
(
[id] => 16951690
[patent_doc_number] => 20210210382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-08
[patent_title] => METHOD FOR FORMING CONTACT STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/194918
[patent_app_country] => US
[patent_app_date] => 2021-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6558
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17194918
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/194918 | METHOD FOR FORMING CONTACT STRUCTURE | Mar 7, 2021 | Pending |
Array
(
[id] => 18040416
[patent_doc_number] => 20220384633
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-01
[patent_title] => Hole Channel Semiconductor Transistor, Manufacturing Method, and Application thereof
[patent_app_type] => utility
[patent_app_number] => 17/594846
[patent_app_country] => US
[patent_app_date] => 2021-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9104
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17594846
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/594846 | Hole Channel Semiconductor Transistor, Manufacturing Method, and Application thereof | Mar 2, 2021 | Pending |
Array
(
[id] => 17159120
[patent_doc_number] => 20210320171
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-14
[patent_title] => SUPERJUNCTION SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUPERJUNCTION SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/187022
[patent_app_country] => US
[patent_app_date] => 2021-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23188
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 318
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187022
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/187022 | SUPERJUNCTION SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUPERJUNCTION SEMICONDUCTOR DEVICE | Feb 25, 2021 | Abandoned |
Array
(
[id] => 16905079
[patent_doc_number] => 20210183995
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => SUPERJUNCTION SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUPERJUNCTION SILICON CARBIDE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/186881
[patent_app_country] => US
[patent_app_date] => 2021-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8044
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 300
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186881
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/186881 | SUPERJUNCTION SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUPERJUNCTION SILICON CARBIDE SEMICONDUCTOR DEVICE | Feb 25, 2021 | Pending |
Array
(
[id] => 18857395
[patent_doc_number] => 11854990
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Method for forming a semiconductor device having TSV formed through a silicon interposer and a second silicon substrate with cavity covering a second die
[patent_app_type] => utility
[patent_app_number] => 17/176299
[patent_app_country] => US
[patent_app_date] => 2021-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 3561
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17176299
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/176299 | Method for forming a semiconductor device having TSV formed through a silicon interposer and a second silicon substrate with cavity covering a second die | Feb 15, 2021 | Issued |
Array
(
[id] => 17486273
[patent_doc_number] => 20220093777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/175233
[patent_app_country] => US
[patent_app_date] => 2021-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5776
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17175233
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/175233 | SEMICONDUCTOR DEVICE | Feb 11, 2021 | Pending |