Search

Bernard Krasnic

Examiner (ID: 17037, Phone: (571)270-1357 , Office: P/2665 )

Most Active Art Unit
2665
Art Unit(s)
2661, 2671, 2624, 2665
Total Applications
744
Issued Applications
571
Pending Applications
55
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19189853 [patent_doc_number] => 20240168766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SHADOW CACHE FOR SECURING CONDITIONAL SPECULATIVE INSTRUCTION EXECUTION [patent_app_type] => utility [patent_app_number] => 18/425378 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18425378 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/425378
SHADOW CACHE FOR SECURING CONDITIONAL SPECULATIVE INSTRUCTION EXECUTION Jan 28, 2024 Pending
Array ( [id] => 20228545 [patent_doc_number] => 12417197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => System to minimize effects of ground plane noise [patent_app_type] => utility [patent_app_number] => 18/408736 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1092 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408736 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408736
System to minimize effects of ground plane noise Jan 9, 2024 Issued
Array ( [id] => 20035058 [patent_doc_number] => 20250173280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => INTERCONNECTS FOR PHYSICALLY UNCLONABLE FUNCTION AND METHOD OF ACHIEVING PHYSICALLY UNCLONABLE FUNCTION THROUGH INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 18/404794 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/404794
Interconnects for physically unclonable function and method of achieving physically unclonable function through interconnects Jan 3, 2024 Issued
Array ( [id] => 20087267 [patent_doc_number] => 20250217203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => HARDWARE-ACCELERATED ATOMIC DATA STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/397222 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397222 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397222
HARDWARE-ACCELERATED ATOMIC DATA STRUCTURES Dec 26, 2023 Pending
Array ( [id] => 20070794 [patent_doc_number] => 20250209016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => STORAGE DEVICE WITH HARDWARE ACCELERATOR [patent_app_type] => utility [patent_app_number] => 18/394412 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394412
STORAGE DEVICE WITH HARDWARE ACCELERATOR Dec 21, 2023 Pending
Array ( [id] => 19303246 [patent_doc_number] => 20240231826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => PERFORMING AN OPERATION ON AN ARRAY OF VALUES AT A PROCESSING UNIT [patent_app_type] => utility [patent_app_number] => 18/392053 [patent_app_country] => US [patent_app_date] => 2023-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18392053 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/392053
PERFORMING AN OPERATION ON AN ARRAY OF VALUES AT A PROCESSING UNIT Dec 20, 2023 Pending
Array ( [id] => 20052161 [patent_doc_number] => 20250190383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => COORDINATE ROTATION DIGITAL COMPUTER USING DIRECT MEMORY ACCESS ENGINES [patent_app_type] => utility [patent_app_number] => 18/530673 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530673 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/530673
Coordinate rotation digital computer using direct memory access engines Dec 5, 2023 Issued
Array ( [id] => 19303522 [patent_doc_number] => 20240232102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => Providing Access to a Single-Ported Storage Device [patent_app_type] => utility [patent_app_number] => 18/525462 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525462 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/525462
Providing access to a single-ported storage device Nov 29, 2023 Issued
Array ( [id] => 19671927 [patent_doc_number] => 12184711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Methods and systems for data transmission [patent_app_type] => utility [patent_app_number] => 18/522614 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 19150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522614 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522614
Methods and systems for data transmission Nov 28, 2023 Issued
Array ( [id] => 19220018 [patent_doc_number] => 20240184722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => MEMORY COMMANDS FOR MULTI-HOST COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 18/521373 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521373 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521373
Memory commands for multi-host communications Nov 27, 2023 Issued
Array ( [id] => 20035075 [patent_doc_number] => 20250173297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => PROCESSING CORE INCLUDING INTEGRATED HIGH CAPACITY HIGH BANDWIDTH STORAGE MEMORY [patent_app_type] => utility [patent_app_number] => 18/519210 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/519210
Processing core including integrated high capacity high bandwidth storage memory Nov 26, 2023 Issued
Array ( [id] => 19036539 [patent_doc_number] => 20240086354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SYSTEM ON CHIP HAVING SEMAPHORE FUNCTION AND METHOD FOR IMPLEMENTING SEMAPHORE FUNCTION [patent_app_type] => utility [patent_app_number] => 18/515091 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515091 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/515091
System on chip having semaphore function and method for implementing semaphore function Nov 19, 2023 Issued
Array ( [id] => 19949931 [patent_doc_number] => 12321293 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-03 [patent_title] => Communication interface controller with output monitoring [patent_app_type] => utility [patent_app_number] => 18/512210 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512210
Communication interface controller with output monitoring Nov 16, 2023 Issued
Array ( [id] => 20018107 [patent_doc_number] => 20250156329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => PREFETCHING USING A DIRECT MEMORY ACCESS ENGINE [patent_app_type] => utility [patent_app_number] => 18/388940 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1186 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388940 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/388940
PREFETCHING USING A DIRECT MEMORY ACCESS ENGINE Nov 12, 2023 Pending
Array ( [id] => 19036378 [patent_doc_number] => 20240086193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => NESTED LOOP CONTROL [patent_app_type] => utility [patent_app_number] => 18/507222 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507222 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507222
Nested loop control Nov 12, 2023 Issued
Array ( [id] => 19780408 [patent_doc_number] => 12229441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Memory system and method for controlling nonvolatile memory [patent_app_type] => utility [patent_app_number] => 18/499750 [patent_app_country] => US [patent_app_date] => 2023-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 21988 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499750 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/499750
Memory system and method for controlling nonvolatile memory Oct 31, 2023 Issued
Array ( [id] => 19992742 [patent_doc_number] => 20250130964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => SYSTEMS AND METHODS FOR DESKTOP BUS (D-BUS) CACHING [patent_app_type] => utility [patent_app_number] => 18/489993 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489993 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/489993
Systems and methods for desktop bus (D-Bus) caching Oct 18, 2023 Issued
Array ( [id] => 19992577 [patent_doc_number] => 20250130799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => TECHNIQUES FOR PERFORMING NON-VECTOR MICRO-OPERATIONS ON VECTOR HARDWARE [patent_app_type] => utility [patent_app_number] => 18/490680 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490680 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490680
TECHNIQUES FOR PERFORMING NON-VECTOR MICRO-OPERATIONS ON VECTOR HARDWARE Oct 18, 2023 Pending
Array ( [id] => 20440317 [patent_doc_number] => 12511153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Arbitrated interrupt steering in heterogeneous processors [patent_app_type] => utility [patent_app_number] => 18/478426 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478426 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/478426
Arbitrated interrupt steering in heterogeneous processors Sep 28, 2023 Issued
Array ( [id] => 19794825 [patent_doc_number] => 12235772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Vector processor storage [patent_app_type] => utility [patent_app_number] => 18/463256 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6808 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463256 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/463256
Vector processor storage Sep 6, 2023 Issued
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