Search

Bernard Krasnic

Examiner (ID: 17037, Phone: (571)270-1357 , Office: P/2665 )

Most Active Art Unit
2665
Art Unit(s)
2661, 2671, 2624, 2665
Total Applications
744
Issued Applications
571
Pending Applications
55
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18471431 [patent_doc_number] => 20230205717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => SYSTEM ON CHIP HAVING SEMAPHORE FUNCTION AND METHOD FOR IMPLEMENTING SEMAPHORE FUNCTION [patent_app_type] => utility [patent_app_number] => 18/179052 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/179052
System on chip having semaphore function and method for implementing semaphore function Mar 5, 2023 Issued
Array ( [id] => 19405617 [patent_doc_number] => 20240289128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => APPLICATION PROGRAMMING INTERFACE TO STORE MEMORY DEPENDENCY INFORMATION [patent_app_type] => utility [patent_app_number] => 18/114612 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 80520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18114612 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/114612
Application programming interface to store memory dependency information Feb 26, 2023 Issued
Array ( [id] => 19391380 [patent_doc_number] => 20240281250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SYSTEM AND METHOD FOR PERFORMING ENERGY-EFFICIENT PROCESSING THROUGH REDUCED DATA MOVEMENT [patent_app_type] => utility [patent_app_number] => 18/171012 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171012 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/171012
System and method for performing energy-efficient processing through reduced data movement Feb 16, 2023 Issued
Array ( [id] => 20018069 [patent_doc_number] => 20250156291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => Container Runtime Environment with Distributed Monitoring Tasks and Minimum Privileges [patent_app_type] => utility [patent_app_number] => 18/838837 [patent_app_country] => US [patent_app_date] => 2023-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18838837 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/838837
Container Runtime Environment with Distributed Monitoring Tasks and Minimum Privileges Jan 29, 2023 Pending
Array ( [id] => 19303241 [patent_doc_number] => 20240231821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => USING CYCLE COUNTS TO SERVE COMPUTE ELEMENTS EXECUTING STATICALLY SCHEDULED INSTRUCTIONS FOR A MACHINE LEARNING ACCELERATOR [patent_app_type] => utility [patent_app_number] => 18/095447 [patent_app_country] => US [patent_app_date] => 2023-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18095447 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/095447
Using cycle counts to serve compute elements executing statically scheduled instructions for a machine learning accelerator Jan 9, 2023 Issued
Array ( [id] => 19375827 [patent_doc_number] => 12067397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => NIC line-rate hardware packet processing [patent_app_type] => utility [patent_app_number] => 18/092837 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18092837 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/092837
NIC line-rate hardware packet processing Jan 2, 2023 Issued
Array ( [id] => 19283775 [patent_doc_number] => 20240220251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => PIM Search Stop Control [patent_app_type] => utility [patent_app_number] => 18/147075 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18147075 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/147075
PIM search stop control Dec 27, 2022 Issued
Array ( [id] => 19595683 [patent_doc_number] => 12153527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Data rate increase for faulty lane recovery in multiple lane data links [patent_app_type] => utility [patent_app_number] => 18/081396 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 13250 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081396 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/081396
Data rate increase for faulty lane recovery in multiple lane data links Dec 13, 2022 Issued
Array ( [id] => 18299614 [patent_doc_number] => 20230109300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => HOST CONTROLLER INTERFACE USING MULTIPLE CIRCULAR QUEUE, AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/064062 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28988 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064062 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/064062
Host controller interface using multiple circular queue, and operating method thereof Dec 8, 2022 Issued
Array ( [id] => 19212292 [patent_doc_number] => 12001354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 17/991914 [patent_app_country] => US [patent_app_date] => 2022-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 22718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991914 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/991914
Semiconductor device and method Nov 21, 2022 Issued
Array ( [id] => 19174627 [patent_doc_number] => 20240160601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => ON-CHIP MEMORY SYSTEM FOR A RECONFIGURABLE PARALLEL PROCESSOR [patent_app_type] => utility [patent_app_number] => 17/984360 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984360 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984360
On-chip memory system for a reconfigurable parallel processor Nov 9, 2022 Issued
Array ( [id] => 19174474 [patent_doc_number] => 20240160448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => MIXED SCALAR AND VECTOR OPERATIONS IN MULTI-THREADED COMPUTING [patent_app_type] => utility [patent_app_number] => 17/984336 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984336 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984336
Mixed scalar and vector operations in multi-threaded computing Nov 9, 2022 Issued
Array ( [id] => 18873408 [patent_doc_number] => 11861218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Memory system and method for controlling nonvolatile memory [patent_app_type] => utility [patent_app_number] => 17/981817 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 21923 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981817 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981817
Memory system and method for controlling nonvolatile memory Nov 6, 2022 Issued
Array ( [id] => 18378029 [patent_doc_number] => 20230153116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => Programmable Accelerator for Data-Dependent, Irregular Operations [patent_app_type] => utility [patent_app_number] => 17/981617 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981617 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981617
Programmable accelerator for data-dependent, irregular operations Nov 6, 2022 Issued
Array ( [id] => 18178902 [patent_doc_number] => 20230039631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SYSTEM DECODER FOR TRAINING ACCELERATORS [patent_app_type] => utility [patent_app_number] => 17/973268 [patent_app_country] => US [patent_app_date] => 2022-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13096 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17973268 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/973268
System decoder for training accelerators Oct 24, 2022 Issued
Array ( [id] => 18873839 [patent_doc_number] => 11861656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Methods and systems to monitor a media device via a USB port [patent_app_type] => utility [patent_app_number] => 18/049187 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10883 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049187 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049187
Methods and systems to monitor a media device via a USB port Oct 23, 2022 Issued
Array ( [id] => 18195479 [patent_doc_number] => 20230048998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SYSTEMS, APPARATUSES, AND METHODS FOR ADDITION OF PARTIAL PRODUCTS [patent_app_type] => utility [patent_app_number] => 17/964964 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17964964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/964964
Systems, apparatuses, and methods for addition of partial products Oct 12, 2022 Issued
Array ( [id] => 18166847 [patent_doc_number] => 20230033452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => TRANSPORTING REQUEST TYPES WITH DIFFERENT LATENCIES [patent_app_type] => utility [patent_app_number] => 17/961229 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961229 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961229
Transporting request types with different latencies Oct 5, 2022 Issued
Array ( [id] => 19259523 [patent_doc_number] => 12019577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Latency reduction for link speed switching in multiple lane data links [patent_app_type] => utility [patent_app_number] => 17/960050 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 13378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960050 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960050
Latency reduction for link speed switching in multiple lane data links Oct 3, 2022 Issued
Array ( [id] => 19443305 [patent_doc_number] => 12093571 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-17 [patent_title] => Accelerating request/response protocols [patent_app_type] => utility [patent_app_number] => 17/937167 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15986 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937167 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937167
Accelerating request/response protocols Sep 29, 2022 Issued
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