Bernard Lipman

Array ( [id] => 3420309 [patent_doc_number] => 05394011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-28 [patent_title] => 'Package structure for semiconductor devices and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 7/972459 [patent_app_country] => US [patent_app_date] => 1993-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 5659 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/394/05394011.pdf [firstpage_image] =>[orig_patent_app_number] => 972459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3457983 [patent_doc_number] => 05378910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-03 [patent_title] => 'Memory transistor having increased interelectrode capacitance' [patent_app_type] => 1 [patent_app_number] => 8/086035 [patent_app_country] => US [patent_app_date] => 1993-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3315 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/378/05378910.pdf [firstpage_image] =>[orig_patent_app_number] => 086035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2998497 [patent_doc_number] => 05367184 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Vertical JFET transistor with optimized bipolar operating mode and corresponding method of fabrication' [patent_app_type] => 1 [patent_app_number] => 8/087427 [patent_app_country] => US [patent_app_date] => 1993-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5058 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367184.pdf [firstpage_image] =>[orig_patent_app_number] => 087427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3080172 [patent_doc_number] => 05323041 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-21 [patent_title] => 'High-breakdown-voltage semiconductor element' [patent_app_type] => 1 [patent_app_number] => 7/901111 [patent_app_country] => US [patent_app_date] => 1993-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 4163 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/323/05323041.pdf [firstpage_image] =>[orig_patent_app_number] => 901111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3483767 [patent_doc_number] => 05399882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-21 [patent_title] => 'Camera device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/077070 [patent_app_country] => US [patent_app_date] => 1993-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5559 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/399/05399882.pdf [firstpage_image] =>[orig_patent_app_number] => 077070 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3543953 [patent_doc_number] => 05481127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Semiconductor memory device having a capacitor' [patent_app_type] => 1 [patent_app_number] => 8/063820 [patent_app_country] => US [patent_app_date] => 1993-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 83 [patent_no_of_words] => 11480 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481127.pdf [firstpage_image] =>[orig_patent_app_number] => 063820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3014906 [patent_doc_number] => 05281839 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-25 [patent_title] => 'Semiconductor device having a short gate length' [patent_app_type] => 1 [patent_app_number] => 8/052856 [patent_app_country] => US [patent_app_date] => 1993-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 2651 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/281/05281839.pdf [firstpage_image] =>[orig_patent_app_number] => 052856 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3457145 [patent_doc_number] => 05451803 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Semiconductor memory device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/048004 [patent_app_country] => US [patent_app_date] => 1993-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 35 [patent_no_of_words] => 5400 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/451/05451803.pdf [firstpage_image] =>[orig_patent_app_number] => 048004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3450034 [patent_doc_number] => 05420443 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-30 [patent_title] => 'Microelectronic structure having an array of diamond structures on a nondiamond substrate and associated fabrication methods' [patent_app_type] => 1 [patent_app_number] => 8/035643 [patent_app_country] => US [patent_app_date] => 1993-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 12954 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/420/05420443.pdf [firstpage_image] =>[orig_patent_app_number] => 035643 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3493699 [patent_doc_number] => 05471081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Semiconductor device with reduced time-dependent dielectric failures' [patent_app_type] => 1 [patent_app_number] => 8/026625 [patent_app_country] => US [patent_app_date] => 1993-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3678 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/471/05471081.pdf [firstpage_image] =>[orig_patent_app_number] => 026625 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3006709 [patent_doc_number] => 05371398 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-06 [patent_title] => 'Thin film transistor' [patent_app_type] => 1 [patent_app_number] => 8/010471 [patent_app_country] => US [patent_app_date] => 1993-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 2852 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/371/05371398.pdf [firstpage_image] =>[orig_patent_app_number] => 010471 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2967069 [patent_doc_number] => 05274270 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Multichip module having SiO.sub.2 insulating layer' [patent_app_type] => 1 [patent_app_number] => 8/008050 [patent_app_country] => US [patent_app_date] => 1993-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 6873 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274270.pdf [firstpage_image] =>[orig_patent_app_number] => 008050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2954590 [patent_doc_number] => 05262664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-16 [patent_title] => 'Process for formation of LDD transistor, and structure thereof' [patent_app_type] => 1 [patent_app_number] => 8/008096 [patent_app_country] => US [patent_app_date] => 1993-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 965 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/262/05262664.pdf [firstpage_image] =>[orig_patent_app_number] => 008096 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2982643 [patent_doc_number] => 05252841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-12 [patent_title] => 'Heterojunction bipolar transistor structure having low base-collector capacitance, and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/006189 [patent_app_country] => US [patent_app_date] => 1993-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3496 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/252/05252841.pdf [firstpage_image] =>[orig_patent_app_number] => 006189 [rel_patent_id] =>[rel_patent_doc_number] =>)