Bernard Lipman

Array ( [id] => 4140672 [patent_doc_number] => 06015998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Flexibility control in optical materials' [patent_app_type] => 1 [patent_app_number] => 8/992638 [patent_app_country] => US [patent_app_date] => 1997-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 3794 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015998.pdf [firstpage_image] =>[orig_patent_app_number] => 992638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4243962 [patent_doc_number] => 06091112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Silicon on insulator semiconductor substrate and fabrication method therefor' [patent_app_type] => 1 [patent_app_number] => 8/991247 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2442 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091112.pdf [firstpage_image] =>[orig_patent_app_number] => 991247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4223080 [patent_doc_number] => 06087718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Stacking type semiconductor chip package' [patent_app_type] => 1 [patent_app_number] => 8/990718 [patent_app_country] => US [patent_app_date] => 1997-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1667 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087718.pdf [firstpage_image] =>[orig_patent_app_number] => 990718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3931660 [patent_doc_number] => 05952686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Salient integration mode active pixel sensor' [patent_app_type] => 1 [patent_app_number] => 8/984457 [patent_app_country] => US [patent_app_date] => 1997-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 5526 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952686.pdf [firstpage_image] =>[orig_patent_app_number] => 984457 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4048583 [patent_doc_number] => 05874747 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'High brightness electroluminescent device emitting in the green to ultraviolet spectrum and method of making the same' [patent_app_type] => 1 [patent_app_number] => 8/894609 [patent_app_country] => US [patent_app_date] => 1997-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 17680 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/874/05874747.pdf [firstpage_image] =>[orig_patent_app_number] => 894609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3947499 [patent_doc_number] => 05982011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Photodiode structure augmented with active area photosensitive regions' [patent_app_type] => 1 [patent_app_number] => 8/977468 [patent_app_country] => US [patent_app_date] => 1997-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2246 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/982/05982011.pdf [firstpage_image] =>[orig_patent_app_number] => 977468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3802118 [patent_doc_number] => 05828119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'MOS LSI with projection structure' [patent_app_type] => 1 [patent_app_number] => 8/976006 [patent_app_country] => US [patent_app_date] => 1997-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 57 [patent_no_of_words] => 13799 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828119.pdf [firstpage_image] =>[orig_patent_app_number] => 976006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3954660 [patent_doc_number] => 05955771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Sensors for use in high vibrational applications and methods for fabricating same' [patent_app_type] => 1 [patent_app_number] => 8/968218 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/955/05955771.pdf [firstpage_image] =>[orig_patent_app_number] => 968218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3961422 [patent_doc_number] => 05936307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Surface modification method for film stress reduction' [patent_app_type] => 1 [patent_app_number] => 8/968660 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2387 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936307.pdf [firstpage_image] =>[orig_patent_app_number] => 968660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4227518 [patent_doc_number] => 06011286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Double stair-like capacitor structure for a DRAM cell' [patent_app_type] => 1 [patent_app_number] => 8/960870 [patent_app_country] => US [patent_app_date] => 1997-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 3093 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011286.pdf [firstpage_image] =>[orig_patent_app_number] => 960870 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3944157 [patent_doc_number] => 05973362 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/951511 [patent_app_country] => US [patent_app_date] => 1997-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2103 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973362.pdf [firstpage_image] =>[orig_patent_app_number] => 951511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4147892 [patent_doc_number] => 06031265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Enhancing DMOS device ruggedness by reducing transistor parasitic resistance and by inducing breakdown near gate runners and termination area' [patent_app_type] => 1 [patent_app_number] => 8/951622 [patent_app_country] => US [patent_app_date] => 1997-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 6407 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031265.pdf [firstpage_image] =>[orig_patent_app_number] => 951622 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4062455 [patent_doc_number] => 05864181 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Bi-level digit line architecture for high density DRAMs' [patent_app_type] => 1 [patent_app_number] => 8/950471 [patent_app_country] => US [patent_app_date] => 1997-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3258 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864181.pdf [firstpage_image] =>[orig_patent_app_number] => 950471 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4119795 [patent_doc_number] => 06046472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Graded LDD implant process for sub-half-micron MOS devices' [patent_app_type] => 1 [patent_app_number] => 8/949997 [patent_app_country] => US [patent_app_date] => 1997-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 2353 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046472.pdf [firstpage_image] =>[orig_patent_app_number] => 949997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4080854 [patent_doc_number] => 06054357 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/948259 [patent_app_country] => US [patent_app_date] => 1997-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2922 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054357.pdf [firstpage_image] =>[orig_patent_app_number] => 948259 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4067661 [patent_doc_number] => 05895948 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Semiconductor device and fabrication process thereof' [patent_app_type] => 1 [patent_app_number] => 8/936919 [patent_app_country] => US [patent_app_date] => 1997-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 42 [patent_no_of_words] => 15068 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/895/05895948.pdf [firstpage_image] =>[orig_patent_app_number] => 936919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4145490 [patent_doc_number] => 06060768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Semiconductor device, method of manufacturing the semiconductor device, and method of manufacturing lead frame' [patent_app_type] => 1 [patent_app_number] => 8/935892 [patent_app_country] => US [patent_app_date] => 1997-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 53 [patent_no_of_words] => 11534 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060768.pdf [firstpage_image] =>[orig_patent_app_number] => 935892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177920 [patent_doc_number] => 06037232 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Semiconductor device having elevated silicidation layer and process for fabrication thereof' [patent_app_type] => 1 [patent_app_number] => 8/929697 [patent_app_country] => US [patent_app_date] => 1997-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2709 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/037/06037232.pdf [firstpage_image] =>[orig_patent_app_number] => 929697 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3989728 [patent_doc_number] => 05959330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Semiconductor device and method of manufacturing same' [patent_app_type] => 1 [patent_app_number] => 8/904557 [patent_app_country] => US [patent_app_date] => 1997-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 4232 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959330.pdf [firstpage_image] =>[orig_patent_app_number] => 904557 [rel_patent_id] =>[rel_patent_doc_number] =>)