
Bernarr E. Gregory
Examiner (ID: 16577)
| Most Active Art Unit | 3648 |
| Art Unit(s) | 3642, 3646, 2202, 3662, 3648, 2766 |
| Total Applications | 4684 |
| Issued Applications | 4115 |
| Pending Applications | 277 |
| Abandoned Applications | 314 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14109543
[patent_doc_number] => 20190096447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-28
[patent_title] => NON-VOLATILE MEMORY DEVICE AND STORAGE DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/975266
[patent_app_country] => US
[patent_app_date] => 2018-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11873
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15975266
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/975266 | Non-volatile memory device and storage device including the same | May 8, 2018 | Issued |
Array
(
[id] => 15759847
[patent_doc_number] => 10622050
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-04-14
[patent_title] => Ferroelectric memory plate power reduction
[patent_app_type] => utility
[patent_app_number] => 15/975628
[patent_app_country] => US
[patent_app_date] => 2018-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 16053
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15975628
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/975628 | Ferroelectric memory plate power reduction | May 8, 2018 | Issued |
Array
(
[id] => 15822555
[patent_doc_number] => 10636469
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-04-28
[patent_title] => Cell voltage accumulation discharge
[patent_app_type] => utility
[patent_app_number] => 15/975624
[patent_app_country] => US
[patent_app_date] => 2018-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 15217
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15975624
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/975624 | Cell voltage accumulation discharge | May 8, 2018 | Issued |
Array
(
[id] => 13558471
[patent_doc_number] => 20180330783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-15
[patent_title] => METHOD FOR MANAGING THE ENDURANCE OF A NON-VOLATILE REWRITABLE MEMORY AND DEVICE FOR PROGRAMMING SUCH A MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/975206
[patent_app_country] => US
[patent_app_date] => 2018-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6067
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 260
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15975206
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/975206 | Method for managing the endurance of a non-volatile rewritable memory and device for programming such a memory | May 8, 2018 | Issued |
Array
(
[id] => 13212445
[patent_doc_number] => 10120591
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-06
[patent_title] => Memory devices, systems and methods employing command/address calibration
[patent_app_type] => utility
[patent_app_number] => 15/962706
[patent_app_country] => US
[patent_app_date] => 2018-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 23
[patent_no_of_words] => 23656
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15962706
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/962706 | Memory devices, systems and methods employing command/address calibration | Apr 24, 2018 | Issued |
Array
(
[id] => 14842669
[patent_doc_number] => 20190279735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-12
[patent_title] => FAILURE MODE DETECTION METHOD AND ERROR CORRECTION METHOD FOR SOLID STATE STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/955774
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7644
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955774
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/955774 | Failure mode detection method and error correction method for solid state storage device | Apr 17, 2018 | Issued |
Array
(
[id] => 16896392
[patent_doc_number] => 11037954
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-15
[patent_title] => Three dimensional flash memory element with middle source-drain line and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/476954
[patent_app_country] => US
[patent_app_date] => 2018-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 19647
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16476954
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/476954 | Three dimensional flash memory element with middle source-drain line and manufacturing method thereof | Apr 12, 2018 | Issued |
Array
(
[id] => 14349819
[patent_doc_number] => 20190156882
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-23
[patent_title] => STATIC RANDOM-ACCESS MEMORY DEVICE, REDUNDANT CIRCUIT THEREOF, AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/947880
[patent_app_country] => US
[patent_app_date] => 2018-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9877
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947880
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947880 | Static random-access memory device, redundant circuit thereof, and semiconductor device | Apr 8, 2018 | Issued |
Array
(
[id] => 13581519
[patent_doc_number] => 20180342308
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-29
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/947992
[patent_app_country] => US
[patent_app_date] => 2018-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14031
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947992
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947992 | Semiconductor device | Apr 8, 2018 | Issued |
Array
(
[id] => 13962777
[patent_doc_number] => 20190057733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-21
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR PROFILING EVENTS IN SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/946992
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5219
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15946992
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/946992 | Semiconductor device and method for profiling events in semiconductor device | Apr 5, 2018 | Issued |
Array
(
[id] => 15138921
[patent_doc_number] => 10482942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Semiconductor device and system
[patent_app_type] => utility
[patent_app_number] => 15/947382
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9038
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947382
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947382 | Semiconductor device and system | Apr 5, 2018 | Issued |
Array
(
[id] => 15984233
[patent_doc_number] => 10672451
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-02
[patent_title] => Storage device and refresh method thereof
[patent_app_type] => utility
[patent_app_number] => 15/947442
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 9432
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947442
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947442 | Storage device and refresh method thereof | Apr 5, 2018 | Issued |
Array
(
[id] => 15138921
[patent_doc_number] => 10482942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Semiconductor device and system
[patent_app_type] => utility
[patent_app_number] => 15/947382
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9038
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947382
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947382 | Semiconductor device and system | Apr 5, 2018 | Issued |
Array
(
[id] => 14125897
[patent_doc_number] => 10249814
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-04-02
[patent_title] => Dynamic memory protection
[patent_app_type] => utility
[patent_app_number] => 15/947660
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5146
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947660
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947660 | Dynamic memory protection | Apr 5, 2018 | Issued |
Array
(
[id] => 15138921
[patent_doc_number] => 10482942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Semiconductor device and system
[patent_app_type] => utility
[patent_app_number] => 15/947382
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9038
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947382
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947382 | Semiconductor device and system | Apr 5, 2018 | Issued |
Array
(
[id] => 15138921
[patent_doc_number] => 10482942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Semiconductor device and system
[patent_app_type] => utility
[patent_app_number] => 15/947382
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9038
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947382
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947382 | Semiconductor device and system | Apr 5, 2018 | Issued |
Array
(
[id] => 14938509
[patent_doc_number] => 20190304893
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => METAL INTERCONNECT FUSE MEMORY ARRAYS
[patent_app_type] => utility
[patent_app_number] => 15/942952
[patent_app_country] => US
[patent_app_date] => 2018-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8901
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15942952
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/942952 | Metal interconnect fuse memory arrays | Apr 1, 2018 | Issued |
Array
(
[id] => 14078895
[patent_doc_number] => 20190088335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-21
[patent_title] => INCREASED TERRACE CONFIGURATION FOR NON-VOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/942044
[patent_app_country] => US
[patent_app_date] => 2018-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20062
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15942044
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/942044 | Increased terrace configuration for non-volatile memory | Mar 29, 2018 | Issued |
Array
(
[id] => 13321023
[patent_doc_number] => 20180212049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-26
[patent_title] => INTEGRATED CIRCUIT AND CODE GENERATING METHOD
[patent_app_type] => utility
[patent_app_number] => 15/927088
[patent_app_country] => US
[patent_app_date] => 2018-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7462
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15927088
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/927088 | Integrated circuit and code generating method | Mar 20, 2018 | Issued |
Array
(
[id] => 14011243
[patent_doc_number] => 10224096
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-03-05
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/921226
[patent_app_country] => US
[patent_app_date] => 2018-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6878
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 256
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15921226
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/921226 | Semiconductor device | Mar 13, 2018 | Issued |