Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13030373 [patent_doc_number] => 10037809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-31 [patent_title] => Memory devices for reading memory cells of different memory planes [patent_app_type] => utility [patent_app_number] => 15/722063 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8598 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15722063 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/722063
Memory devices for reading memory cells of different memory planes Oct 1, 2017 Issued
Array ( [id] => 14557701 [patent_doc_number] => 10347318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 15/709674 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 29 [patent_no_of_words] => 9184 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15709674 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/709674
Semiconductor memory device Sep 19, 2017 Issued
Array ( [id] => 12796957 [patent_doc_number] => 20180157488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => COMPUTATIONAL MEMORY CELL AND PROCESSING ARRAY DEVICE USING MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 15/709379 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15709379 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/709379
Computational memory cell and processing array device using memory cells Sep 18, 2017 Issued
Array ( [id] => 16200614 [patent_doc_number] => 10725777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Computational memory cell and processing array device using memory cells [patent_app_type] => utility [patent_app_number] => 15/709382 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8298 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15709382 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/709382
Computational memory cell and processing array device using memory cells Sep 18, 2017 Issued
Array ( [id] => 14800697 [patent_doc_number] => 10403357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Resistive non-volatile memory and a method for sensing a memory cell in a resistive non-volatile memory [patent_app_type] => utility [patent_app_number] => 15/707350 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5434 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15707350 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/707350
Resistive non-volatile memory and a method for sensing a memory cell in a resistive non-volatile memory Sep 17, 2017 Issued
Array ( [id] => 14267217 [patent_doc_number] => 10283178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/706280 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8011 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706280 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706280
Semiconductor device Sep 14, 2017 Issued
Array ( [id] => 14603061 [patent_doc_number] => 10354724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Methods and apparatus for programming barrier modulated memory cells [patent_app_type] => utility [patent_app_number] => 15/706562 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 17257 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706562 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706562
Methods and apparatus for programming barrier modulated memory cells Sep 14, 2017 Issued
Array ( [id] => 13173541 [patent_doc_number] => 10102890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Semiconductor device and semiconductor system [patent_app_type] => utility [patent_app_number] => 15/701020 [patent_app_country] => US [patent_app_date] => 2017-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 11237 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15701020 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/701020
Semiconductor device and semiconductor system Sep 10, 2017 Issued
Array ( [id] => 13861807 [patent_doc_number] => 10192626 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-29 [patent_title] => Responding to power loss [patent_app_type] => utility [patent_app_number] => 15/691824 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 11532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691824 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/691824
Responding to power loss Aug 30, 2017 Issued
Array ( [id] => 15952261 [patent_doc_number] => 10664035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Reconfigurable power delivery networks [patent_app_type] => utility [patent_app_number] => 15/692456 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5438 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692456 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692456
Reconfigurable power delivery networks Aug 30, 2017 Issued
Array ( [id] => 14671559 [patent_doc_number] => 10373694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Responding to power loss [patent_app_type] => utility [patent_app_number] => 15/691840 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 13351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691840 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/691840
Responding to power loss Aug 30, 2017 Issued
Array ( [id] => 15315039 [patent_doc_number] => 10522229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Secure erase for data corruption [patent_app_type] => utility [patent_app_number] => 15/691584 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12529 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691584 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/691584
Secure erase for data corruption Aug 29, 2017 Issued
Array ( [id] => 12095334 [patent_doc_number] => 20170352427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'MEMORY CONTROLLER, MEMORY CONTROL METHOD, AND COEFFICIENT DECISION METHOD' [patent_app_type] => utility [patent_app_number] => 15/686833 [patent_app_country] => US [patent_app_date] => 2017-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7063 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686833 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686833
Memory controller, memory control method, and coefficient decision method Aug 24, 2017 Issued
Array ( [id] => 13995199 [patent_doc_number] => 20190066757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => ADJUSTING SIGNAL TIMING [patent_app_type] => utility [patent_app_number] => 15/683906 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15683906 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/683906
Adjusting signal timing Aug 22, 2017 Issued
Array ( [id] => 13996293 [patent_doc_number] => 20190067304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => ANTIFUSES INTEGRATED ON SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES [patent_app_type] => utility [patent_app_number] => 15/684126 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 1 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684126 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684126
Antifuses integrated on semiconductor-on-insulator (SOI) substrates Aug 22, 2017 Issued
Array ( [id] => 12822892 [patent_doc_number] => 20180166136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => MEMORY DEVICE AND METHOD FOR OPERATING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/683876 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15683876 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/683876
Memory device and method for operating memory device Aug 22, 2017 Issued
Array ( [id] => 14267979 [patent_doc_number] => 10283562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Process for fabricating three dimensional non-volatile memory system [patent_app_type] => utility [patent_app_number] => 15/684162 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 8916 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684162 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684162
Process for fabricating three dimensional non-volatile memory system Aug 22, 2017 Issued
Array ( [id] => 13976853 [patent_doc_number] => 10217795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-26 [patent_title] => Memory cell for non-volatile memory system [patent_app_type] => utility [patent_app_number] => 15/684150 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 8916 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684150
Memory cell for non-volatile memory system Aug 22, 2017 Issued
Array ( [id] => 13995321 [patent_doc_number] => 20190066818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => DETERMINATION OF FAST TO PROGRAM WORD LINES IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 15/683602 [patent_app_country] => US [patent_app_date] => 2017-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18288 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15683602 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/683602
Determination of fast to program word lines in non-volatile memory Aug 21, 2017 Issued
Array ( [id] => 12989320 [patent_doc_number] => 20170345499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => MULTI-FUNCTION RESISTANCE CHANGE MEMORY CELLS AND APPARATUSES INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/676629 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9570 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15676629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/676629
MULTI-FUNCTION RESISTANCE CHANGE MEMORY CELLS AND APPARATUSES INCLUDING THE SAME Aug 13, 2017 Abandoned
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