Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12294285 [patent_doc_number] => 09935116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Manufacturing method of semiconductor memory device [patent_app_type] => utility [patent_app_number] => 15/672298 [patent_app_country] => US [patent_app_date] => 2017-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 5801 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15672298 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/672298
Manufacturing method of semiconductor memory device Aug 8, 2017 Issued
Array ( [id] => 14424849 [patent_doc_number] => 10317221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Data processing system [patent_app_type] => utility [patent_app_number] => 15/667761 [patent_app_country] => US [patent_app_date] => 2017-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 44 [patent_no_of_words] => 14971 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667761 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667761
Data processing system Aug 2, 2017 Issued
Array ( [id] => 14063533 [patent_doc_number] => 10236067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => State-dependent read voltage threshold adaptation for nonvolatile memory [patent_app_type] => utility [patent_app_number] => 15/667473 [patent_app_country] => US [patent_app_date] => 2017-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9312 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667473 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667473
State-dependent read voltage threshold adaptation for nonvolatile memory Aug 1, 2017 Issued
Array ( [id] => 12413736 [patent_doc_number] => 09971521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Memory devices, systems and methods employing command/address calibration [patent_app_type] => utility [patent_app_number] => 15/667130 [patent_app_country] => US [patent_app_date] => 2017-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 23604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667130 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667130
Memory devices, systems and methods employing command/address calibration Aug 1, 2017 Issued
Array ( [id] => 12188403 [patent_doc_number] => 20180047339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'DISPLAY DRIVER, ELECTRO-OPTICAL DEVICE, AND ELECTRICAL APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/665667 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7972 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665667 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/665667
Display driver, electro-optical device, and electrical apparatus Jul 31, 2017 Issued
Array ( [id] => 12631950 [patent_doc_number] => 20180102480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-12 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/662729 [patent_app_country] => US [patent_app_date] => 2017-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15662729 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/662729
Display device and method of manufacturing the same Jul 27, 2017 Issued
Array ( [id] => 11911009 [patent_doc_number] => 09779826 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-03 [patent_title] => 'Memory devices for reading memory cells of different memory planes' [patent_app_type] => utility [patent_app_number] => 15/657451 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9274 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 430 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15657451 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/657451
Memory devices for reading memory cells of different memory planes Jul 23, 2017 Issued
Array ( [id] => 12139446 [patent_doc_number] => 20180017528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'IDENTIFICATION AND CHARACTERIZATION OF REMOTE OBJECTS BY ELECTRIC CHARGE TUNNELING, INJECTION, AND INDUCTION, AND AN ERASABLE ORGANIC MOLECULAR MEMORY' [patent_app_type] => utility [patent_app_number] => 15/647640 [patent_app_country] => US [patent_app_date] => 2017-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15647640 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/647640
Identification and characterization of remote objects by electric charge tunneling, injection, and induction, and an erasable organic molecular memory Jul 11, 2017 Issued
Array ( [id] => 13832125 [patent_doc_number] => 20190019547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => ACTIVATION OF MEMORY CORE CIRCUITS IN AN INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/647410 [patent_app_country] => US [patent_app_date] => 2017-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15647410 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/647410
Activation of memory core circuits in an integrated circuit Jul 11, 2017 Issued
Array ( [id] => 12822817 [patent_doc_number] => 20180166111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => NON-VOLATILE MEMORY DEVICE HAVING DUMMY CELLS AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/647658 [patent_app_country] => US [patent_app_date] => 2017-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15647658 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/647658
Non-volatile memory device having dummy cells and memory system including the same Jul 11, 2017 Issued
Array ( [id] => 14798331 [patent_doc_number] => 10402169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method and system of secure random seed generation for a cryptographically secure pseudo-random number generator [patent_app_type] => utility [patent_app_number] => 15/648234 [patent_app_country] => US [patent_app_date] => 2017-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7694 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15648234 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/648234
Method and system of secure random seed generation for a cryptographically secure pseudo-random number generator Jul 11, 2017 Issued
Array ( [id] => 15284769 [patent_doc_number] => 10515049 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-24 [patent_title] => Memory circuits and methods for distributed memory hazard detection and error recovery [patent_app_type] => utility [patent_app_number] => 15/640541 [patent_app_country] => US [patent_app_date] => 2017-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 100 [patent_no_of_words] => 60868 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640541 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640541
Memory circuits and methods for distributed memory hazard detection and error recovery Jun 30, 2017 Issued
Array ( [id] => 13084737 [patent_doc_number] => 10062440 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-28 [patent_title] => Non-volatile semiconductor memory device and reading method thereof [patent_app_type] => utility [patent_app_number] => 15/627460 [patent_app_country] => US [patent_app_date] => 2017-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3330 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15627460 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/627460
Non-volatile semiconductor memory device and reading method thereof Jun 19, 2017 Issued
Array ( [id] => 13629303 [patent_doc_number] => 20180366204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => WORD LINE READ DISTURB ERROR REDUCTION THROUGH FINE GRAINED ACCESS COUNTER MECHANISM [patent_app_type] => utility [patent_app_number] => 15/627928 [patent_app_country] => US [patent_app_date] => 2017-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5811 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15627928 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/627928
Word line read disturb error reduction through fine grained access counter mechanism Jun 19, 2017 Issued
Array ( [id] => 14800751 [patent_doc_number] => 10403384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Testing a semiconductor device including a voltage detection circuit and temperature detection circuit that can be used to generate read assist and/or write assist in an SRAM circuit portion and method therefor [patent_app_type] => utility [patent_app_number] => 15/628589 [patent_app_country] => US [patent_app_date] => 2017-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 39 [patent_no_of_words] => 22292 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628589 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/628589
Testing a semiconductor device including a voltage detection circuit and temperature detection circuit that can be used to generate read assist and/or write assist in an SRAM circuit portion and method therefor Jun 19, 2017 Issued
Array ( [id] => 11869301 [patent_doc_number] => 20170236586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/583609 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15583609 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/583609
Semiconductor storage device Apr 30, 2017 Issued
Array ( [id] => 14284637 [patent_doc_number] => 20190139603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => STORAGE OF CODES IN MOLECULARLY IMPRINTED POLYMERS [patent_app_type] => utility [patent_app_number] => 16/096008 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16096008 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/096008
Storage of codes in molecularly imprinted polymers Apr 26, 2017 Issued
Array ( [id] => 11854672 [patent_doc_number] => 20170229164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'REFRESH VERIFICATION CIRCUIT, SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/497451 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8486 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15497451 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/497451
Refresh verification circuit, semiconductor apparatus and semiconductor system Apr 25, 2017 Issued
Array ( [id] => 13070737 [patent_doc_number] => 10056152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Methods of reading data in nonvolatile memory devices and nonvolatile memory devices [patent_app_type] => utility [patent_app_number] => 15/493326 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 11863 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493326 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493326
Methods of reading data in nonvolatile memory devices and nonvolatile memory devices Apr 20, 2017 Issued
Array ( [id] => 11933121 [patent_doc_number] => 09800130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Semiconductor device and semiconductor module' [patent_app_type] => utility [patent_app_number] => 15/493840 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 4995 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493840 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493840
Semiconductor device and semiconductor module Apr 20, 2017 Issued
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