Bernarr E. Gregory

Array ( [id] => 5986406 [patent_doc_number] => 20020098664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Method of producing SOI materials' [patent_app_type] => new [patent_app_number] => 09/767787 [patent_app_country] => US [patent_app_date] => 2001-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20020098664.pdf [firstpage_image] =>[orig_patent_app_number] => 09767787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6547241 [patent_doc_number] => 20020110946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Metamorphic long wavelength high-speed photodiode' [patent_app_type] => new [patent_app_number] => 09/766797 [patent_app_country] => US [patent_app_date] => 2001-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6622 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20020110946.pdf [firstpage_image] =>[orig_patent_app_number] => 09766797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1366998 [patent_doc_number] => 06566199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-20 [patent_title] => 'Method and system for forming film, semiconductor device and fabrication method thereof' [patent_app_type] => B2 [patent_app_number] => 09/761637 [patent_app_country] => US [patent_app_date] => 2001-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 36 [patent_no_of_words] => 15640 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566199.pdf [firstpage_image] =>[orig_patent_app_number] => 09761637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1397229 [patent_doc_number] => 06531393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-11 [patent_title] => 'Salicide integrated solution for embedded virtual-ground memory' [patent_app_type] => B2 [patent_app_number] => 09/760597 [patent_app_country] => US [patent_app_date] => 2001-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2398 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531393.pdf [firstpage_image] =>[orig_patent_app_number] => 09760597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5968489 [patent_doc_number] => 20020090768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'Ground-plane device with back oxide topography' [patent_app_type] => new [patent_app_number] => 09/757317 [patent_app_country] => US [patent_app_date] => 2001-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3191 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20020090768.pdf [firstpage_image] =>[orig_patent_app_number] => 09757317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1340253 [patent_doc_number] => 06593593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'Transparent electrode comprising ZnO and a film with a melting point lower than that of ZnO' [patent_app_type] => B2 [patent_app_number] => 09/752517 [patent_app_country] => US [patent_app_date] => 2001-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 40 [patent_no_of_words] => 7451 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593593.pdf [firstpage_image] =>[orig_patent_app_number] => 09752517 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6876105 [patent_doc_number] => 20010006258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-05 [patent_title] => 'Stacked semiconductor package and fabricating method thereof' [patent_app_type] => new-utility [patent_app_number] => 09/752727 [patent_app_country] => US [patent_app_date] => 2001-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3665 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20010006258.pdf [firstpage_image] =>[orig_patent_app_number] => 09752727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6630629 [patent_doc_number] => 20020086502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'Method of forming a doped region in a semiconductor material' [patent_app_type] => new [patent_app_number] => 09/751217 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2728 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20020086502.pdf [firstpage_image] =>[orig_patent_app_number] => 09751217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1237205 [patent_doc_number] => 06690065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-10 [patent_title] => 'Substrate-biased silicon diode for electrostatic discharge protection and fabrication method' [patent_app_type] => B2 [patent_app_number] => 09/749377 [patent_app_country] => US [patent_app_date] => 2000-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 32 [patent_no_of_words] => 5876 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/690/06690065.pdf [firstpage_image] =>[orig_patent_app_number] => 09749377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6130202 [patent_doc_number] => 20020076923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'CONTROLLED ANNEAL CONDUCTORS FOR INTEGRATED CIRCUIT INTERCONNECTS' [patent_app_type] => new [patent_app_number] => 09/745917 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2915 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20020076923.pdf [firstpage_image] =>[orig_patent_app_number] => 09745917 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1420468 [patent_doc_number] => 06521924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-18 [patent_title] => 'Image sensor incorporating therein a capacitor structure and method for the manufacture thereof' [patent_app_type] => B2 [patent_app_number] => 09/742817 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 2802 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521924.pdf [firstpage_image] =>[orig_patent_app_number] => 09742817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6548422 [patent_doc_number] => 20020111027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Polishing compositions for noble metals' [patent_app_type] => new [patent_app_number] => 09/734087 [patent_app_country] => US [patent_app_date] => 2000-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4832 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20020111027.pdf [firstpage_image] =>[orig_patent_app_number] => 09734087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5828723 [patent_doc_number] => 20020068416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Method for depositing an undopped silicate glass layer' [patent_app_type] => new [patent_app_number] => 09/730127 [patent_app_country] => US [patent_app_date] => 2000-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20020068416.pdf [firstpage_image] =>[orig_patent_app_number] => 09730127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1474632 [patent_doc_number] => 06387796 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/707846 [patent_app_country] => US [patent_app_date] => 2000-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 23 [patent_no_of_words] => 2497 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/387/06387796.pdf [firstpage_image] =>[orig_patent_app_number] => 09707846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1578214 [patent_doc_number] => 06448159 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Chemical mechanical polishing for forming a shallow trench isolation structure' [patent_app_type] => B1 [patent_app_number] => 09/692251 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2216 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448159.pdf [firstpage_image] =>[orig_patent_app_number] => 09692251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1172536 [patent_doc_number] => 06750102 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'Semiconductor non-volatile memory device having an improved write speed' [patent_app_type] => B1 [patent_app_number] => 09/689442 [patent_app_country] => US [patent_app_date] => 2000-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7072 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750102.pdf [firstpage_image] =>[orig_patent_app_number] => 09689442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1155763 [patent_doc_number] => 06764928 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Method of manufacturing an El display device' [patent_app_type] => B1 [patent_app_number] => 09/621943 [patent_app_country] => US [patent_app_date] => 2000-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 23 [patent_no_of_words] => 5435 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/764/06764928.pdf [firstpage_image] =>[orig_patent_app_number] => 09621943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1532480 [patent_doc_number] => 06410391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Method for producing an EEPROM memory cell with a trench capacitor' [patent_app_type] => B1 [patent_app_number] => 09/607317 [patent_app_country] => US [patent_app_date] => 2000-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 8556 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/410/06410391.pdf [firstpage_image] =>[orig_patent_app_number] => 09607317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1478020 [patent_doc_number] => 06451642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Method to implant NMOS polycrystalline silicon in embedded FLASH memory applications' [patent_app_type] => B1 [patent_app_number] => 09/599377 [patent_app_country] => US [patent_app_date] => 2000-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2341 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/451/06451642.pdf [firstpage_image] =>[orig_patent_app_number] => 09599377 [rel_patent_id] =>[rel_patent_doc_number] =>)