Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11431871 [patent_doc_number] => 09570192 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-14 [patent_title] => 'System and method for reducing programming voltage stress on memory cell devices' [patent_app_type] => utility [patent_app_number] => 15/061882 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9418 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061882 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061882
System and method for reducing programming voltage stress on memory cell devices Mar 3, 2016 Issued
Array ( [id] => 11071018 [patent_doc_number] => 20160267983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/055296 [patent_app_country] => US [patent_app_date] => 2016-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055296 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/055296
Semiconductor memory device Feb 25, 2016 Issued
Array ( [id] => 11194083 [patent_doc_number] => 09424901 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-23 [patent_title] => 'Semiconductor memory device outputting status signal and operating method thereof' [patent_app_type] => utility [patent_app_number] => 15/053165 [patent_app_country] => US [patent_app_date] => 2016-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 10449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15053165 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/053165
Semiconductor memory device outputting status signal and operating method thereof Feb 24, 2016 Issued
Array ( [id] => 11397763 [patent_doc_number] => 20170018300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'REFRESH VERIFICATION CIRCUIT, SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/053407 [patent_app_country] => US [patent_app_date] => 2016-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8496 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15053407 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/053407
Refresh verification circuit, semiconductor apparatus and semiconductor system Feb 24, 2016 Issued
Array ( [id] => 11333544 [patent_doc_number] => 09524793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-20 [patent_title] => 'Semiconductor memory device and operating method thereof' [patent_app_type] => utility [patent_app_number] => 15/052279 [patent_app_country] => US [patent_app_date] => 2016-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8315 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15052279 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/052279
Semiconductor memory device and operating method thereof Feb 23, 2016 Issued
Array ( [id] => 11417400 [patent_doc_number] => 09564232 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 15/052364 [patent_app_country] => US [patent_app_date] => 2016-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 32 [patent_no_of_words] => 9328 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15052364 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/052364
Semiconductor memory device Feb 23, 2016 Issued
Array ( [id] => 11050590 [patent_doc_number] => 20160247549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/051481 [patent_app_country] => US [patent_app_date] => 2016-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15051481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/051481
Semiconductor memory device Feb 22, 2016 Issued
Array ( [id] => 11937918 [patent_doc_number] => 20170242068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'APPARATUS AND METHOD FOR MONITORING AND PREDICTING RELIABILITY OF AN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/051571 [patent_app_country] => US [patent_app_date] => 2016-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8525 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15051571 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/051571
Apparatus and method for monitoring and predicting reliability of an integrated circuit Feb 22, 2016 Issued
Array ( [id] => 13750907 [patent_doc_number] => 10168391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Multi-functional interconnect module and carrier with multi-functional interconnect module attached thereto [patent_app_type] => utility [patent_app_number] => 15/049923 [patent_app_country] => US [patent_app_date] => 2016-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 48 [patent_no_of_words] => 13513 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15049923 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/049923
Multi-functional interconnect module and carrier with multi-functional interconnect module attached thereto Feb 21, 2016 Issued
Array ( [id] => 11876202 [patent_doc_number] => 09747982 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-29 [patent_title] => 'Device and method for generating random numbers' [patent_app_type] => utility [patent_app_number] => 15/050324 [patent_app_country] => US [patent_app_date] => 2016-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2723 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15050324 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/050324
Device and method for generating random numbers Feb 21, 2016 Issued
Array ( [id] => 11300410 [patent_doc_number] => 09508420 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-29 [patent_title] => 'Voltage-aware adaptive static random access memory (SRAM) write assist circuit' [patent_app_type] => utility [patent_app_number] => 15/009132 [patent_app_country] => US [patent_app_date] => 2016-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6709 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15009132 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/009132
Voltage-aware adaptive static random access memory (SRAM) write assist circuit Jan 27, 2016 Issued
Array ( [id] => 10787179 [patent_doc_number] => 20160133335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SEMICONDUCTOR DEVICE CAPABLE OF RESCUING DEFECTIVE CHARACTERISTICS OCCURRING AFTER PACKAGING' [patent_app_type] => utility [patent_app_number] => 14/997041 [patent_app_country] => US [patent_app_date] => 2016-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15776 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14997041 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/997041
Semiconductor device capable of rescuing defective characteristics occurring after packaging Jan 14, 2016 Issued
Array ( [id] => 11404640 [patent_doc_number] => 20170025178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/990230 [patent_app_country] => US [patent_app_date] => 2016-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8380 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14990230 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/990230
Semiconductor memory device and operating method thereof Jan 6, 2016 Issued
Array ( [id] => 11524264 [patent_doc_number] => 09607674 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Pulse latch reset tracking at high differential voltage' [patent_app_type] => utility [patent_app_number] => 14/989750 [patent_app_country] => US [patent_app_date] => 2016-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7635 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989750 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/989750
Pulse latch reset tracking at high differential voltage Jan 5, 2016 Issued
Array ( [id] => 15138917 [patent_doc_number] => 10482940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Computational accuracy in a crossbar array [patent_app_type] => utility [patent_app_number] => 16/062578 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 9943 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16062578 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/062578
Computational accuracy in a crossbar array Dec 16, 2015 Issued
Array ( [id] => 10758364 [patent_doc_number] => 20160104516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/972427 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7261 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14972427 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/972427
SEMICONDUCTOR STORAGE DEVICE Dec 16, 2015 Abandoned
Array ( [id] => 11279148 [patent_doc_number] => 09495627 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-15 [patent_title] => 'Magnetic tunnel junction based chip identification' [patent_app_type] => utility [patent_app_number] => 14/969282 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7631 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969282 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969282
Magnetic tunnel junction based chip identification Dec 14, 2015 Issued
Array ( [id] => 10638191 [patent_doc_number] => 09355699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Voltage-controlled magnetic anisotropy (VCMA) switch and magneto-electric memory (MERAM)' [patent_app_type] => utility [patent_app_number] => 14/968195 [patent_app_country] => US [patent_app_date] => 2015-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 63 [patent_no_of_words] => 17871 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968195 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/968195
Voltage-controlled magnetic anisotropy (VCMA) switch and magneto-electric memory (MERAM) Dec 13, 2015 Issued
Array ( [id] => 10731603 [patent_doc_number] => 20160077753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'DETERMINING BIAS INFORMATION FOR OFFSETTING OPERATING VARIATIONS IN MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 14/948229 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948229 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948229
Determining bias information for offsetting operating variations in memory cells Nov 19, 2015 Issued
Array ( [id] => 11000603 [patent_doc_number] => 20160197550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'MEMORY APPARATUS, CHARGE PUMP CIRCUIT AND VOLTAGE PUMPING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/944228 [patent_app_country] => US [patent_app_date] => 2015-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3182 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14944228 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/944228
Memory apparatus, charge pump circuit and voltage pumping method thereof Nov 17, 2015 Issued
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