
Bernarr E. Gregory
Examiner (ID: 16577)
| Most Active Art Unit | 3648 |
| Art Unit(s) | 3642, 3646, 2202, 3662, 3648, 2766 |
| Total Applications | 4684 |
| Issued Applications | 4115 |
| Pending Applications | 277 |
| Abandoned Applications | 314 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11431794
[patent_doc_number] => 09570115
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-14
[patent_title] => 'Memory device, related method, and related electronic device'
[patent_app_type] => utility
[patent_app_number] => 14/943626
[patent_app_country] => US
[patent_app_date] => 2015-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6846
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 285
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14943626
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/943626 | Memory device, related method, and related electronic device | Nov 16, 2015 | Issued |
Array
(
[id] => 11578432
[patent_doc_number] => 09633700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-25
[patent_title] => 'Power on reset circuit and semiconductor memory device including the same'
[patent_app_type] => utility
[patent_app_number] => 14/943288
[patent_app_country] => US
[patent_app_date] => 2015-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5373
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14943288
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/943288 | Power on reset circuit and semiconductor memory device including the same | Nov 16, 2015 | Issued |
Array
(
[id] => 11359951
[patent_doc_number] => 09536608
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-01-03
[patent_title] => 'Content addressable memory device'
[patent_app_type] => utility
[patent_app_number] => 14/943152
[patent_app_country] => US
[patent_app_date] => 2015-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2729
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14943152
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/943152 | Content addressable memory device | Nov 16, 2015 | Issued |
Array
(
[id] => 11200878
[patent_doc_number] => 09431096
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-08-30
[patent_title] => 'Hierarchical negative bitline boost write assist for SRAM memory devices'
[patent_app_type] => utility
[patent_app_number] => 14/943026
[patent_app_country] => US
[patent_app_date] => 2015-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 6103
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14943026
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/943026 | Hierarchical negative bitline boost write assist for SRAM memory devices | Nov 16, 2015 | Issued |
Array
(
[id] => 11702048
[patent_doc_number] => 09691978
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-27
[patent_title] => 'Semiconductor memory device and method of controlling the same'
[patent_app_type] => utility
[patent_app_number] => 14/941946
[patent_app_country] => US
[patent_app_date] => 2015-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 28
[patent_no_of_words] => 10915
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14941946
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/941946 | Semiconductor memory device and method of controlling the same | Nov 15, 2015 | Issued |
Array
(
[id] => 10794846
[patent_doc_number] => 20160141003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-19
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/942348
[patent_app_country] => US
[patent_app_date] => 2015-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 10461
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14942348
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/942348 | Semiconductor memory device | Nov 15, 2015 | Issued |
Array
(
[id] => 11346078
[patent_doc_number] => 09530491
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-27
[patent_title] => 'System and method for direct write to MLC memory'
[patent_app_type] => utility
[patent_app_number] => 14/942456
[patent_app_country] => US
[patent_app_date] => 2015-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8842
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14942456
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/942456 | System and method for direct write to MLC memory | Nov 15, 2015 | Issued |
Array
(
[id] => 11791573
[patent_doc_number] => 09401213
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-07-26
[patent_title] => 'Non-volatile memory apparatus and operation method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/941654
[patent_app_country] => US
[patent_app_date] => 2015-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 5511
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14941654
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/941654 | Non-volatile memory apparatus and operation method thereof | Nov 14, 2015 | Issued |
Array
(
[id] => 11246205
[patent_doc_number] => 09472250
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-10-18
[patent_title] => 'Semiconductor device and operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/939752
[patent_app_country] => US
[patent_app_date] => 2015-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2722
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14939752
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/939752 | Semiconductor device and operating method thereof | Nov 11, 2015 | Issued |
Array
(
[id] => 11417352
[patent_doc_number] => 09564184
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-07
[patent_title] => 'Sense amplifier for single-ended sensing'
[patent_app_type] => utility
[patent_app_number] => 14/939782
[patent_app_country] => US
[patent_app_date] => 2015-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2597
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14939782
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/939782 | Sense amplifier for single-ended sensing | Nov 11, 2015 | Issued |
Array
(
[id] => 10802522
[patent_doc_number] => 20160148679
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-26
[patent_title] => 'TAMPER-RESISTANT NON-VOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/938744
[patent_app_country] => US
[patent_app_date] => 2015-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 43
[patent_no_of_words] => 40279
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14938744
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/938744 | Tamper-resistant non-volatile memory device | Nov 10, 2015 | Issued |
Array
(
[id] => 11246263
[patent_doc_number] => 09472308
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-10-18
[patent_title] => 'Semiconductor memory device and test method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/930174
[patent_app_country] => US
[patent_app_date] => 2015-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 6384
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930174
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/930174 | Semiconductor memory device and test method thereof | Nov 1, 2015 | Issued |
Array
(
[id] => 13859519
[patent_doc_number] => 10191477
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-29
[patent_title] => System and method for modification management of a configuration system
[patent_app_type] => utility
[patent_app_number] => 14/927866
[patent_app_country] => US
[patent_app_date] => 2015-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5733
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14927866
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/927866 | System and method for modification management of a configuration system | Oct 29, 2015 | Issued |
Array
(
[id] => 11359961
[patent_doc_number] => 09536617
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-03
[patent_title] => 'Ad hoc digital multi-die polling for peak ICC management'
[patent_app_type] => utility
[patent_app_number] => 14/928992
[patent_app_country] => US
[patent_app_date] => 2015-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 7911
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14928992
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/928992 | Ad hoc digital multi-die polling for peak ICC management | Oct 29, 2015 | Issued |
Array
(
[id] => 11592612
[patent_doc_number] => 20170117024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-27
[patent_title] => 'BIT LINE CHARGING FOR A DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/924498
[patent_app_country] => US
[patent_app_date] => 2015-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 13130
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14924498
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/924498 | Bit line charging for a device | Oct 26, 2015 | Issued |
Array
(
[id] => 13864379
[patent_doc_number] => 10193932
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-29
[patent_title] => Real-time energy data publishing systems and methods
[patent_app_type] => utility
[patent_app_number] => 14/921142
[patent_app_country] => US
[patent_app_date] => 2015-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9410
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14921142
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/921142 | Real-time energy data publishing systems and methods | Oct 22, 2015 | Issued |
Array
(
[id] => 13103943
[patent_doc_number] => 10070597
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-11
[patent_title] => Method to cycle the drive motors of an irrigation system
[patent_app_type] => utility
[patent_app_number] => 14/918288
[patent_app_country] => US
[patent_app_date] => 2015-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 4968
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918288
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/918288 | Method to cycle the drive motors of an irrigation system | Oct 19, 2015 | Issued |
Array
(
[id] => 11510519
[patent_doc_number] => 09601690
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-03-21
[patent_title] => 'Sub-oxide interface layer for two-terminal memory'
[patent_app_type] => utility
[patent_app_number] => 14/887050
[patent_app_country] => US
[patent_app_date] => 2015-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 12934
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14887050
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/887050 | Sub-oxide interface layer for two-terminal memory | Oct 18, 2015 | Issued |
Array
(
[id] => 10689266
[patent_doc_number] => 20160035410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-04
[patent_title] => 'MEMORY AND MEMORY SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/883305
[patent_app_country] => US
[patent_app_date] => 2015-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 21032
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883305
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/883305 | Memory and memory system including the same | Oct 13, 2015 | Issued |
Array
(
[id] => 13239007
[patent_doc_number] => 10132699
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-11-20
[patent_title] => Electrodeposition processes for magnetostrictive resonators
[patent_app_type] => utility
[patent_app_number] => 14/876652
[patent_app_country] => US
[patent_app_date] => 2015-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 32
[patent_no_of_words] => 24709
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14876652
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/876652 | Electrodeposition processes for magnetostrictive resonators | Oct 5, 2015 | Issued |