Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10349946 [patent_doc_number] => 20150234950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'Methods and Apparatus for Synthesizing Multi-Port Memory Circuits' [patent_app_type] => utility [patent_app_number] => 14/702971 [patent_app_country] => US [patent_app_date] => 2015-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10939 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14702971 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/702971
Methods and apparatus for synthesizing multi-port memory circuits May 3, 2015 Issued
Array ( [id] => 10336355 [patent_doc_number] => 20150221360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/689994 [patent_app_country] => US [patent_app_date] => 2015-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7249 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14689994 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/689994
Semiconductor memory device Apr 16, 2015 Issued
Array ( [id] => 10314997 [patent_doc_number] => 20150200000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/670525 [patent_app_country] => US [patent_app_date] => 2015-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14936 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14670525 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/670525
Semiconductor device Mar 26, 2015 Issued
Array ( [id] => 11431855 [patent_doc_number] => 09570176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Nonvolatile memory device, storage device having the same, operating method thereof' [patent_app_type] => utility [patent_app_number] => 14/668544 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 11647 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668544 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668544
Nonvolatile memory device, storage device having the same, operating method thereof Mar 24, 2015 Issued
Array ( [id] => 10717910 [patent_doc_number] => 20160064057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'ADDRESS ALIGNER AND MEMORY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/668232 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10523 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668232 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668232
Address aligner and memory device including the same Mar 24, 2015 Issued
Array ( [id] => 10479156 [patent_doc_number] => 20150364173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'STORAGE DEVICE INCLUDING NONVOLATILE MEMORY AND MEMORY CONTROLLER AND OPERATING METHOD OF RETIMING CIRCUIT INTERFACING COMMUNICATION BETWEEN NONVOLATILE MEMORY AND MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 14/665148 [patent_app_country] => US [patent_app_date] => 2015-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 22309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14665148 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/665148
Storage device including nonvolatile memory and memory controller and operating method of retiming circuit interfacing communication between nonvolatile memory and memory controller Mar 22, 2015 Issued
Array ( [id] => 11637664 [patent_doc_number] => 09659645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Resistive memory device and method of writing data' [patent_app_type] => utility [patent_app_number] => 14/665140 [patent_app_country] => US [patent_app_date] => 2015-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 12838 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14665140 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/665140
Resistive memory device and method of writing data Mar 22, 2015 Issued
Array ( [id] => 10409722 [patent_doc_number] => 20150294731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'Method to Reduce Program Disturbs in Non-Volatile Memory Cells' [patent_app_type] => utility [patent_app_number] => 14/664131 [patent_app_country] => US [patent_app_date] => 2015-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5512 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14664131 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/664131
Method to reduce program disturbs in non-volatile memory cells Mar 19, 2015 Issued
Array ( [id] => 12412143 [patent_doc_number] => 09970986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Integrated circuit authentication [patent_app_type] => utility [patent_app_number] => 14/640180 [patent_app_country] => US [patent_app_date] => 2015-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4784 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14640180 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/640180
Integrated circuit authentication Mar 5, 2015 Issued
Array ( [id] => 11062035 [patent_doc_number] => 20160258997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'TESTING IMPEDANCE ADJUSTMENT' [patent_app_type] => utility [patent_app_number] => 14/639293 [patent_app_country] => US [patent_app_date] => 2015-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639293 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/639293
Testing impedance adjustment Mar 4, 2015 Issued
Array ( [id] => 11063510 [patent_doc_number] => 20160260472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'MEMORY POWER SELECTION USING LOCAL VOLTAGE REGULATORS' [patent_app_type] => utility [patent_app_number] => 14/635264 [patent_app_country] => US [patent_app_date] => 2015-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14635264 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/635264
Memory power selection using local voltage regulators Mar 1, 2015 Issued
Array ( [id] => 10285754 [patent_doc_number] => 20150170752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'FAST-READING NAND FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 14/631027 [patent_app_country] => US [patent_app_date] => 2015-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6950 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14631027 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/631027
Fast-reading NAND flash memory Feb 24, 2015 Issued
Array ( [id] => 11043294 [patent_doc_number] => 20160240251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'CIRCUITS AND METHODS FOR LIMITING CURRENT IN RANDOM ACCESS MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 14/621488 [patent_app_country] => US [patent_app_date] => 2015-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621488 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/621488
Circuits and methods for limiting current in random access memory cells Feb 12, 2015 Issued
Array ( [id] => 10645107 [patent_doc_number] => 09361980 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'RRAM array using multiple reset voltages and method of resetting RRAM array using multiple reset voltages' [patent_app_type] => utility [patent_app_number] => 14/620352 [patent_app_country] => US [patent_app_date] => 2015-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14620352 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/620352
RRAM array using multiple reset voltages and method of resetting RRAM array using multiple reset voltages Feb 11, 2015 Issued
Array ( [id] => 11221354 [patent_doc_number] => 09449697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Semiconductor memory device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/621344 [patent_app_country] => US [patent_app_date] => 2015-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 5975 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/621344
Semiconductor memory device and manufacturing method thereof Feb 11, 2015 Issued
Array ( [id] => 10417900 [patent_doc_number] => 20150302910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'MAGNETIC MEMORY' [patent_app_type] => utility [patent_app_number] => 14/610617 [patent_app_country] => US [patent_app_date] => 2015-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8267 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14610617 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/610617
Magnetic memory Jan 29, 2015 Issued
Array ( [id] => 10315357 [patent_doc_number] => 20150200360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'GCIB-TREATED RESISTIVE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/596666 [patent_app_country] => US [patent_app_date] => 2015-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8590 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14596666 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/596666
GCIB-treated resistive device Jan 13, 2015 Issued
Array ( [id] => 10195570 [patent_doc_number] => 09224483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-29 [patent_title] => 'Nonvolatile memory device, system and programming method with dynamic verification mode selection' [patent_app_type] => utility [patent_app_number] => 14/595788 [patent_app_country] => US [patent_app_date] => 2015-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 34 [patent_no_of_words] => 19278 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14595788 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/595788
Nonvolatile memory device, system and programming method with dynamic verification mode selection Jan 12, 2015 Issued
Array ( [id] => 10302413 [patent_doc_number] => 20150187413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'METHODS AND APPARATUSES USING A TRANSFER FUNCTION TO PREDICT RESISTANCE SHIFTS AND/OR NOISE OF RESISTANCE-BASED MEMORY' [patent_app_type] => utility [patent_app_number] => 14/595757 [patent_app_country] => US [patent_app_date] => 2015-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3551 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14595757 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/595757
Methods and apparatuses using a transfer function to predict resistance shifts and/or noise of resistance-based memory Jan 12, 2015 Issued
Array ( [id] => 10998938 [patent_doc_number] => 20160195885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'VALIDATION CIRCUIT FOR REFERENCE VOLTAGE SHIFTED DATA' [patent_app_type] => utility [patent_app_number] => 14/591623 [patent_app_country] => US [patent_app_date] => 2015-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5267 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14591623 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/591623
Validation circuit for reference voltage shifted data Jan 6, 2015 Issued
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