Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9804257 [patent_doc_number] => 20150016202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'MEMORY DEVICES, SYSTEMS AND METHODS EMPLOYING COMMAND/ADDRESS CALIBRATION' [patent_app_type] => utility [patent_app_number] => 14/504087 [patent_app_country] => US [patent_app_date] => 2014-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 25227 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14504087 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/504087
Memory devices, systems and methods employing command/address calibration Sep 30, 2014 Issued
Array ( [id] => 10130730 [patent_doc_number] => 09164562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Data storage device for forcibly discharging residual voltage, method operating the same, and data processing system including the same' [patent_app_type] => utility [patent_app_number] => 14/496586 [patent_app_country] => US [patent_app_date] => 2014-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5003 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14496586 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/496586
Data storage device for forcibly discharging residual voltage, method operating the same, and data processing system including the same Sep 24, 2014 Issued
Array ( [id] => 9924631 [patent_doc_number] => 08982605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Phase change memory device having multi-level and method of driving the same' [patent_app_type] => utility [patent_app_number] => 14/494355 [patent_app_country] => US [patent_app_date] => 2014-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 7167 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14494355 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/494355
Phase change memory device having multi-level and method of driving the same Sep 22, 2014 Issued
Array ( [id] => 10047176 [patent_doc_number] => 09087575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Phase change memory device having multi-level and method of driving the same' [patent_app_type] => utility [patent_app_number] => 14/494403 [patent_app_country] => US [patent_app_date] => 2014-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 7110 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14494403 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/494403
Phase change memory device having multi-level and method of driving the same Sep 22, 2014 Issued
Array ( [id] => 9924632 [patent_doc_number] => 08982606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Phase change memory device having multi-level and method of driving the same' [patent_app_type] => utility [patent_app_number] => 14/494382 [patent_app_country] => US [patent_app_date] => 2014-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 7171 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14494382 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/494382
Phase change memory device having multi-level and method of driving the same Sep 22, 2014 Issued
Array ( [id] => 10732764 [patent_doc_number] => 20160078914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'STT-MRAM SENSING TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 14/484742 [patent_app_country] => US [patent_app_date] => 2014-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6862 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14484742 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/484742
STT-MRAM sensing technique Sep 11, 2014 Issued
Array ( [id] => 11233554 [patent_doc_number] => 09460785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 14/482198 [patent_app_country] => US [patent_app_date] => 2014-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 14811 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14482198 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/482198
Semiconductor storage device Sep 9, 2014 Issued
Array ( [id] => 10502235 [patent_doc_number] => 09230637 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-01-05 [patent_title] => 'SRAM circuit with increased write margin' [patent_app_type] => utility [patent_app_number] => 14/481384 [patent_app_country] => US [patent_app_date] => 2014-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2512 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14481384 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/481384
SRAM circuit with increased write margin Sep 8, 2014 Issued
Array ( [id] => 10563306 [patent_doc_number] => 09286987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-15 [patent_title] => 'Controlling pass voltages to minimize program disturb in charge-trapping memory' [patent_app_type] => utility [patent_app_number] => 14/481304 [patent_app_country] => US [patent_app_date] => 2014-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 28 [patent_no_of_words] => 14410 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14481304 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/481304
Controlling pass voltages to minimize program disturb in charge-trapping memory Sep 8, 2014 Issued
Array ( [id] => 11286268 [patent_doc_number] => 09502125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Concurrently reading first and second pages of memory cells having different page addresses' [patent_app_type] => utility [patent_app_number] => 14/479950 [patent_app_country] => US [patent_app_date] => 2014-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9213 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14479950 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/479950
Concurrently reading first and second pages of memory cells having different page addresses Sep 7, 2014 Issued
Array ( [id] => 10512671 [patent_doc_number] => 09240249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-01-19 [patent_title] => 'AC stress methods to screen out bit line defects' [patent_app_type] => utility [patent_app_number] => 14/475138 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 38 [patent_no_of_words] => 14042 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475138 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475138
AC stress methods to screen out bit line defects Sep 1, 2014 Issued
Array ( [id] => 10966084 [patent_doc_number] => 20140369117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'MULTIPLE STEP PROGRAMMING IN A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/471550 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14471550 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/471550
Multiple step programming in a memory device Aug 27, 2014 Issued
Array ( [id] => 12101918 [patent_doc_number] => 09859016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Semiconductor device and method for writing thereto' [patent_app_type] => utility [patent_app_number] => 15/038747 [patent_app_country] => US [patent_app_date] => 2014-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 30 [patent_no_of_words] => 22175 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15038747 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/038747
Semiconductor device and method for writing thereto Aug 25, 2014 Issued
Array ( [id] => 10356504 [patent_doc_number] => 20150241509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/460911 [patent_app_country] => US [patent_app_date] => 2014-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5010 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14460911 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/460911
Semiconductor device and operating method thereof Aug 14, 2014 Issued
Array ( [id] => 10952328 [patent_doc_number] => 20140355349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/460189 [patent_app_country] => US [patent_app_date] => 2014-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11083 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14460189 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/460189
Semiconductor memory device Aug 13, 2014 Issued
Array ( [id] => 10944893 [patent_doc_number] => 20140347914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'MULTI-FUNCTION RESISTANCE CHANGE MEMORY CELLS AND APPARATUSES INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/456510 [patent_app_country] => US [patent_app_date] => 2014-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9818 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14456510 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/456510
Multi-function resistance change memory cells and apparatuses including the same Aug 10, 2014 Issued
Array ( [id] => 11180427 [patent_doc_number] => 09412422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Memory device and method for putting a memory cell into a state with a reduced leakage current consumption' [patent_app_type] => utility [patent_app_number] => 14/338396 [patent_app_country] => US [patent_app_date] => 2014-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 10350 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338396 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/338396
Memory device and method for putting a memory cell into a state with a reduced leakage current consumption Jul 22, 2014 Issued
Array ( [id] => 10410000 [patent_doc_number] => 20150295009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'LIGHT EMITTING DIODE DEVICE WITH RECONSTITUTED LED COMPONENTS ON SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/338327 [patent_app_country] => US [patent_app_date] => 2014-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338327 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/338327
Light emitting diode device with reconstituted LED components on substrate Jul 21, 2014 Issued
Array ( [id] => 11796759 [patent_doc_number] => 09406606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Semiconductor device having a reduced area and enhanced yield' [patent_app_type] => utility [patent_app_number] => 14/336984 [patent_app_country] => US [patent_app_date] => 2014-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9310 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14336984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/336984
Semiconductor device having a reduced area and enhanced yield Jul 20, 2014 Issued
Array ( [id] => 10207489 [patent_doc_number] => 20150092477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'ADAPTIVE DATA-RETENTION-VOLTAGE REGULATING SYSTEM FOR SRAM' [patent_app_type] => utility [patent_app_number] => 14/334690 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3665 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334690 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334690
Adaptive data-retention-voltage regulating system for SRAM Jul 17, 2014 Issued
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