Bernarr E. Gregory

Array ( [id] => 9718557 [patent_doc_number] => 20140254255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'MRAM WTIH METAL GATE WRITE CONDUCTORS' [patent_app_type] => utility [patent_app_number] => 14/282497 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 2236 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14282497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9824804 [patent_doc_number] => 08934296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Dual-port semiconductor memory and first in first out (FIFO) memory having electrically floating body transistor' [patent_app_type] => utility [patent_app_number] => 14/282850 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 84 [patent_no_of_words] => 31355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14282850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10563312 [patent_doc_number] => 09286993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Determining read voltages for reading memory' [patent_app_type] => utility [patent_app_number] => 14/282967 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8170 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14282967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10944890 [patent_doc_number] => 20140347912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'SENSE AMPLIFIER LOCAL FEEDBACK TO CONTROL BIT LINE VOLTAGE' [patent_app_type] => utility [patent_app_number] => 14/283034 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13538 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9718556 [patent_doc_number] => 20140254254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND DRIVING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/281433 [patent_app_country] => US [patent_app_date] => 2014-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5478 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14281433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10651935 [patent_doc_number] => 09368198 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-14 [patent_title] => 'Circuits and methods for placing programmable impedance memory elements in high impedance states' [patent_app_type] => utility [patent_app_number] => 14/281830 [patent_app_country] => US [patent_app_date] => 2014-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 5438 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14281830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9945844 [patent_doc_number] => 08995160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Electronic component including a matrix of TCAM cells' [patent_app_type] => utility [patent_app_number] => 14/280955 [patent_app_country] => US [patent_app_date] => 2014-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2736 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14280955 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10944924 [patent_doc_number] => 20140347946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'VOLTAGE REGULATOR' [patent_app_type] => utility [patent_app_number] => 14/279486 [patent_app_country] => US [patent_app_date] => 2014-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4144 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14279486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10171875 [patent_doc_number] => 09202587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Nonvolatile memory device, memory system comprising same, and method of programming same' [patent_app_type] => utility [patent_app_number] => 14/278743 [patent_app_country] => US [patent_app_date] => 2014-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 5930 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14278743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10239549 [patent_doc_number] => 20150124545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/278031 [patent_app_country] => US [patent_app_date] => 2014-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4836 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14278031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9819374 [patent_doc_number] => 08929169 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-06 [patent_title] => 'Power management for nonvolatile memory array' [patent_app_type] => utility [patent_app_number] => 14/276830 [patent_app_country] => US [patent_app_date] => 2014-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 7307 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14276830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9669450 [patent_doc_number] => 20140233312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE FOR STORING MULTIVALUED DATA' [patent_app_type] => utility [patent_app_number] => 14/266275 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 29428 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14266275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9668058 [patent_doc_number] => 20140231921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'APPARATUS FOR HIGH SPEED ROM CELLS' [patent_app_type] => utility [patent_app_number] => 14/263634 [patent_app_country] => US [patent_app_date] => 2014-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14263634 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9655417 [patent_doc_number] => 20140226422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF TESTING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/252421 [patent_app_country] => US [patent_app_date] => 2014-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5229 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14252421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10401230 [patent_doc_number] => 20150286239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'Single-Junction Voltage Reference' [patent_app_type] => utility [patent_app_number] => 14/245693 [patent_app_country] => US [patent_app_date] => 2014-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14245693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9633474 [patent_doc_number] => 20140211582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'Semiconductor Device Performing Stress Test' [patent_app_type] => utility [patent_app_number] => 14/243183 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5172 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243183 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10053260 [patent_doc_number] => 09093140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/225037 [patent_app_country] => US [patent_app_date] => 2014-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 6674 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11600267 [patent_doc_number] => 09647449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Integrated circuit arrangement, method and system for use in a safety-critical application' [patent_app_type] => utility [patent_app_number] => 14/219805 [patent_app_country] => US [patent_app_date] => 2014-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6707 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14219805 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9939118 [patent_doc_number] => 08988938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Method to reduce program disturbs in non-volatile memory cells' [patent_app_type] => utility [patent_app_number] => 14/216589 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14216589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11831492 [patent_doc_number] => 09728240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Pulse programming techniques for voltage-controlled magnetoresistive tunnel junction (MTJ)' [patent_app_type] => utility [patent_app_number] => 14/214064 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2562 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14214064 [rel_patent_id] =>[rel_patent_doc_number] =>)