Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10508993 [patent_doc_number] => 09236870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Integrated circuits and methods for dynamic frequency scaling' [patent_app_type] => utility [patent_app_number] => 14/082308 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 10920 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082308 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/082308
Integrated circuits and methods for dynamic frequency scaling Nov 17, 2013 Issued
Array ( [id] => 10086040 [patent_doc_number] => 09123391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 14/082320 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7196 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082320 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/082320
Semiconductor storage device Nov 17, 2013 Issued
Array ( [id] => 10092864 [patent_doc_number] => 09129691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Voltage-controlled magnetic anisotropy (VCMA) switch and magneto-electric memory (MeRAM)' [patent_app_type] => utility [patent_app_number] => 14/082118 [patent_app_country] => US [patent_app_date] => 2013-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 63 [patent_no_of_words] => 17777 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082118 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/082118
Voltage-controlled magnetic anisotropy (VCMA) switch and magneto-electric memory (MeRAM) Nov 15, 2013 Issued
Array ( [id] => 9361881 [patent_doc_number] => 20140071754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE FOR STORING MULTIVALUED DATA' [patent_app_type] => utility [patent_app_number] => 14/079279 [patent_app_country] => US [patent_app_date] => 2013-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 29379 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14079279 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/079279
Semiconductor memory device for storing multivalued data Nov 12, 2013 Issued
Array ( [id] => 10610697 [patent_doc_number] => 09330734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-03 [patent_title] => 'Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system' [patent_app_type] => utility [patent_app_number] => 14/072540 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4760 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072540 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/072540
Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system Nov 4, 2013 Issued
Array ( [id] => 9491183 [patent_doc_number] => 20140141590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-22 [patent_title] => 'GCIB-TREATED RESISTIVE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/069043 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8566 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14069043 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/069043
GCIB-treated resistive device Oct 30, 2013 Issued
Array ( [id] => 9316179 [patent_doc_number] => 20140048517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'SYSTEMS AND METHODS FOR DIAGNOSING SECONDARY WELD ERRORS' [patent_app_type] => utility [patent_app_number] => 14/064946 [patent_app_country] => US [patent_app_date] => 2013-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14064946 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/064946
Systems and methods for diagnosing secondary weld errors Oct 27, 2013 Issued
Array ( [id] => 9292944 [patent_doc_number] => 20140036577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory Having Electrically Floating Body Transistor' [patent_app_type] => utility [patent_app_number] => 14/046986 [patent_app_country] => US [patent_app_date] => 2013-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 68 [patent_figures_cnt] => 68 [patent_no_of_words] => 31626 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14046986 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/046986
Dual-port semiconductor memory and first in first out (FIFO) memory having electrically floating body transistor Oct 5, 2013 Issued
Array ( [id] => 9279357 [patent_doc_number] => 20140029325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'APPARATUS AND METHODS FOR A PHYSICAL LAYOUT OF SIMULTANEOUSLY SUB-ACCESSIBLE MEMORY MODULES' [patent_app_type] => utility [patent_app_number] => 14/046756 [patent_app_country] => US [patent_app_date] => 2013-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3654 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14046756 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/046756
Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules Oct 3, 2013 Issued
Array ( [id] => 10922100 [patent_doc_number] => 20140325120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'RESISTIVE MEMORY DEVICE AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/043524 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043524 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/043524
Resistive memory device and operation method thereof Sep 30, 2013 Issued
Array ( [id] => 10966095 [patent_doc_number] => 20140369127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/028647 [patent_app_country] => US [patent_app_date] => 2013-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 16286 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14028647 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/028647
Semiconductor memory device Sep 16, 2013 Issued
Array ( [id] => 9420273 [patent_doc_number] => 20140104923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'RESISTIVE MEMORY DEVICES AND METHODS OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/027337 [patent_app_country] => US [patent_app_date] => 2013-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14027337 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/027337
Resistive memory devices and methods of operating the same Sep 15, 2013 Issued
Array ( [id] => 10189429 [patent_doc_number] => 09218855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Semiconductor device and memory control method' [patent_app_type] => utility [patent_app_number] => 14/028249 [patent_app_country] => US [patent_app_date] => 2013-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 16887 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14028249 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/028249
Semiconductor device and memory control method Sep 15, 2013 Issued
Array ( [id] => 10131827 [patent_doc_number] => 09165668 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Data retention monitoring using temperature history in solid state drives' [patent_app_type] => utility [patent_app_number] => 14/026017 [patent_app_country] => US [patent_app_date] => 2013-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3430 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14026017 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/026017
Data retention monitoring using temperature history in solid state drives Sep 12, 2013 Issued
Array ( [id] => 10132319 [patent_doc_number] => 09166163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Sub-oxide interface layer for two-terminal memory' [patent_app_type] => utility [patent_app_number] => 14/027045 [patent_app_country] => US [patent_app_date] => 2013-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 12923 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14027045 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/027045
Sub-oxide interface layer for two-terminal memory Sep 12, 2013 Issued
Array ( [id] => 10132220 [patent_doc_number] => 09166063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Nonvolatile memory devices and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 14/024319 [patent_app_country] => US [patent_app_date] => 2013-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8354 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14024319 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/024319
Nonvolatile memory devices and methods of operating the same Sep 10, 2013 Issued
Array ( [id] => 10865608 [patent_doc_number] => 08891326 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-18 [patent_title] => 'Method of sensing data in magnetic random access memory with overlap of high and low resistance distributions' [patent_app_type] => utility [patent_app_number] => 14/024580 [patent_app_country] => US [patent_app_date] => 2013-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5139 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14024580 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/024580
Method of sensing data in magnetic random access memory with overlap of high and low resistance distributions Sep 10, 2013 Issued
Array ( [id] => 9279369 [patent_doc_number] => 20140029337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE WHICH STORES PLURAL DATA IN A CELL' [patent_app_type] => utility [patent_app_number] => 14/017611 [patent_app_country] => US [patent_app_date] => 2013-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 62 [patent_no_of_words] => 39179 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14017611 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/017611
Semiconductor memory device which stores plural data in a cell Sep 3, 2013 Issued
Array ( [id] => 11770613 [patent_doc_number] => 09379313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Non-volatile spin switch' [patent_app_type] => utility [patent_app_number] => 14/425320 [patent_app_country] => US [patent_app_date] => 2013-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 8845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14425320 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/425320
Non-volatile spin switch Aug 29, 2013 Issued
Array ( [id] => 9819358 [patent_doc_number] => 08929153 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-06 [patent_title] => 'Memory with multiple word line design' [patent_app_type] => utility [patent_app_number] => 13/975254 [patent_app_country] => US [patent_app_date] => 2013-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5876 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13975254 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/975254
Memory with multiple word line design Aug 22, 2013 Issued
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