
Bernarr E. Gregory
Examiner (ID: 16577)
| Most Active Art Unit | 3648 |
| Art Unit(s) | 3642, 3646, 2202, 3662, 3648, 2766 |
| Total Applications | 4684 |
| Issued Applications | 4115 |
| Pending Applications | 277 |
| Abandoned Applications | 314 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9952745
[patent_doc_number] => 09001546
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-07
[patent_title] => '3D structure for advanced SRAM design to avoid half-selected issue'
[patent_app_type] => utility
[patent_app_number] => 13/972988
[patent_app_country] => US
[patent_app_date] => 2013-08-22
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Array
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[patent_doc_number] => 20140085960
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[patent_issue_date] => 2014-03-27
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC DEVICE'
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[patent_app_date] => 2013-08-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973490 | Semiconductor memory device and electronic device | Aug 21, 2013 | Issued |
Array
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[patent_title] => 'NONVOLATILE MEMORY DEVICE, ERASING METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME'
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[patent_app_number] => 13/967455
[patent_app_country] => US
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Array
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[id] => 9287713
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[patent_issue_date] => 2014-02-04
[patent_title] => 'Resistor thin film MTP memory'
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[patent_app_number] => 13/953626
[patent_app_country] => US
[patent_app_date] => 2013-07-29
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Array
(
[id] => 9712660
[patent_doc_number] => 08837245
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[patent_issue_date] => 2014-09-16
[patent_title] => 'Memory cell array latchup prevention'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/949116 | Memory cell array latchup prevention | Jul 22, 2013 | Issued |
Array
(
[id] => 9137274
[patent_doc_number] => 20130297989
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[patent_issue_date] => 2013-11-07
[patent_title] => 'Memory Device Readout Using Multiple Sense Times'
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Array
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[patent_title] => 'Method to reduce program disturbs in non-volatile memory cells'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/920352 | Method to reduce program disturbs in non-volatile memory cells | Jun 17, 2013 | Issued |
Array
(
[id] => 9092736
[patent_doc_number] => 20130272047
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[patent_issue_date] => 2013-10-17
[patent_title] => 'MEMORY DEVICE FROM WHICH DUMMY EDGE MEMORY BLOCK IS REMOVED'
[patent_app_type] => utility
[patent_app_number] => 13/915338
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/915338 | Memory device from which dummy edge memory block is removed | Jun 10, 2013 | Issued |
Array
(
[id] => 10358331
[patent_doc_number] => 20150243336
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[patent_issue_date] => 2015-08-27
[patent_title] => 'Decreased Switching Current in Spin-Transfer Torque Memory'
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[patent_app_number] => 14/431607
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/431607 | Decreased switching current in spin-transfer torque memory | Jun 9, 2013 | Issued |
Array
(
[id] => 9300986
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[patent_title] => 'Nonvolatile semiconductor memory device which transfers a plurality of voltages to memory cells and method of writing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/909286 | Nonvolatile semiconductor memory device which transfers a plurality of voltages to memory cells and method of writing the same | Jun 3, 2013 | Issued |
Array
(
[id] => 9064534
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[patent_issue_date] => 2013-10-03
[patent_title] => 'WELDING POWER SUPPLY WITH DIGITAL CONTROL OF DUTY CYCLE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/899188 | Welding power supply with digital control of duty cycle | May 20, 2013 | Issued |
Array
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[id] => 9014914
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[patent_title] => 'SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEMORY DEVICE TESTERS FOR SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/847189 | System and method for reducing pin-count of memory devices, and memory device testers for same | Mar 18, 2013 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/845308 | Semiconductor apparatus | Mar 17, 2013 | Issued |
Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/785501 | Nonvolatile semiconductor memory device and method of manufacturing the same | Mar 4, 2013 | Issued |