Bernarr E. Gregory

Array ( [id] => 8555610 [patent_doc_number] => 08330084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Temperature-control circuit of a heating line and a temperature-control method thereof' [patent_app_type] => utility [patent_app_number] => 13/554571 [patent_app_country] => US [patent_app_date] => 2012-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4178 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13554571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8480791 [patent_doc_number] => 20120280198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'GCIB-TREATED RESISTIVE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/551243 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551243 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8798336 [patent_doc_number] => 08437214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Memory cell employing reduced voltage' [patent_app_type] => utility [patent_app_number] => 13/551057 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5030 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9221634 [patent_doc_number] => 20140016409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'MULTIPLE STEP PROGRAMMING IN A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/548342 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548342 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10884019 [patent_doc_number] => 08908407 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-09 [patent_title] => 'Content addressable memory (“CAM”)' [patent_app_type] => utility [patent_app_number] => 13/548382 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 16966 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548382 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9324924 [patent_doc_number] => 08659954 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-25 [patent_title] => 'CBRAM/ReRAM with improved program and erase algorithms' [patent_app_type] => utility [patent_app_number] => 13/548470 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8475826 [patent_doc_number] => 20120275233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'SOFT LANDING FOR DESIRED PROGRAM THRESHOLD VOLTAGE' [patent_app_type] => utility [patent_app_number] => 13/547559 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5698 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9505320 [patent_doc_number] => 08743644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Semiconductor integrated circuit having array E-fuse and driving method thereof' [patent_app_type] => utility [patent_app_number] => 13/547582 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9678623 [patent_doc_number] => 08817543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Flash memory' [patent_app_type] => utility [patent_app_number] => 13/546036 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8158 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546036 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8636216 [patent_doc_number] => 20130028018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/546120 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 18670 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9415248 [patent_doc_number] => 08699294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 13/545444 [patent_app_country] => US [patent_app_date] => 2012-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4314 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13545444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8475827 [patent_doc_number] => 20120275234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'NONVOLATILE MEMORY DEVICES, MEMORY SYSTEMS AND COMPUTING SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/545588 [patent_app_country] => US [patent_app_date] => 2012-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 19891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13545588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8706742 [patent_doc_number] => 20130064031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'Adaptive Read Wordline Voltage Boosting Apparatus and Method for Multi-Port SRAM' [patent_app_type] => utility [patent_app_number] => 13/543916 [patent_app_country] => US [patent_app_date] => 2012-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3947 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13543916 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9442482 [patent_doc_number] => 08711604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Non-volatile semiconductor memory and data processing method in non-volatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 13/544412 [patent_app_country] => US [patent_app_date] => 2012-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5240 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13544412 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10178947 [patent_doc_number] => 09209160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Semiconductor devices compatible with mono-rank and multi-ranks' [patent_app_type] => utility [patent_app_number] => 13/535537 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 38 [patent_no_of_words] => 22548 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9217322 [patent_doc_number] => 08630128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Method and system for a serial peripheral interface' [patent_app_type] => utility [patent_app_number] => 13/523060 [patent_app_country] => US [patent_app_date] => 2012-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 13197 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13523060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8415849 [patent_doc_number] => 20120243349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'PROGRAM CYCLE SKIP' [patent_app_type] => utility [patent_app_number] => 13/488609 [patent_app_country] => US [patent_app_date] => 2012-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16513 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13488609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8702721 [patent_doc_number] => 08395948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Program cycle skip' [patent_app_type] => utility [patent_app_number] => 13/488600 [patent_app_country] => US [patent_app_date] => 2012-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 16500 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13488600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9061312 [patent_doc_number] => 08547754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Charge pump operation in a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 13/471778 [patent_app_country] => US [patent_app_date] => 2012-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13471778 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9595902 [patent_doc_number] => 20140192580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'LOW POWER CONTENT ADDRESSABLE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/977524 [patent_app_country] => US [patent_app_date] => 2012-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3301 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13977524 [rel_patent_id] =>[rel_patent_doc_number] =>)