Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9246888 [patent_doc_number] => 08611178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Device and method to perform memory operations at a clock domain crossing' [patent_app_type] => utility [patent_app_number] => 13/294944 [patent_app_country] => US [patent_app_date] => 2011-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9163 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13294944 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/294944
Device and method to perform memory operations at a clock domain crossing Nov 10, 2011 Issued
Array ( [id] => 8847729 [patent_doc_number] => 08456919 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-04 [patent_title] => 'Method and apparatus to provide data including hard bit data and soft bit data to a rank modulation decoder' [patent_app_type] => utility [patent_app_number] => 13/293988 [patent_app_country] => US [patent_app_date] => 2011-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11238 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13293988 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/293988
Method and apparatus to provide data including hard bit data and soft bit data to a rank modulation decoder Nov 9, 2011 Issued
Array ( [id] => 9118555 [patent_doc_number] => 20130285477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'WIRELESS POWER MECHANISMS FOR LAB-ON-A-CHIP DEVICES' [patent_app_type] => utility [patent_app_number] => 13/884594 [patent_app_country] => US [patent_app_date] => 2011-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7600 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13884594 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/884594
Wireless power mechanisms for lab-on-a-chip devices Nov 8, 2011 Issued
Array ( [id] => 8387490 [patent_doc_number] => 08264894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Semiconductor memory device capable of memorizing multivalued data' [patent_app_type] => utility [patent_app_number] => 13/289083 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 79 [patent_no_of_words] => 23934 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289083 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289083
Semiconductor memory device capable of memorizing multivalued data Nov 3, 2011 Issued
Array ( [id] => 8423068 [patent_doc_number] => 08279558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Top bond pad bias and variation control' [patent_app_type] => utility [patent_app_number] => 13/289752 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4778 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289752 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289752
Top bond pad bias and variation control Nov 3, 2011 Issued
Array ( [id] => 8539379 [patent_doc_number] => 08315101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'Non-volatile memory and semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/288383 [patent_app_country] => US [patent_app_date] => 2011-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 38 [patent_no_of_words] => 15374 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13288383 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/288383
Non-volatile memory and semiconductor device Nov 2, 2011 Issued
Array ( [id] => 9267917 [patent_doc_number] => 20140022834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'CREATING UNIQUE IDENTIFICATION FOR AN ARRAY ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/288910 [patent_app_country] => US [patent_app_date] => 2011-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3072 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13288910 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/288910
CREATING UNIQUE IDENTIFICATION FOR AN ARRAY ELEMENT Nov 2, 2011 Abandoned
Array ( [id] => 7789611 [patent_doc_number] => 20120051167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/285445 [patent_app_country] => US [patent_app_date] => 2011-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3635 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20120051167.pdf [firstpage_image] =>[orig_patent_app_number] => 13285445 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/285445
Semiconductor memory device Oct 30, 2011 Issued
Array ( [id] => 8136779 [patent_doc_number] => 20120092937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'Method and System for A Serial Peripheral Interface' [patent_app_type] => utility [patent_app_number] => 13/282116 [patent_app_country] => US [patent_app_date] => 2011-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12969 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20120092937.pdf [firstpage_image] =>[orig_patent_app_number] => 13282116 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/282116
Method and system for a serial peripheral interface Oct 25, 2011 Issued
Array ( [id] => 8840326 [patent_doc_number] => 20130135954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'MEMORY CELL ARRAY LATCHUP PREVENTION' [patent_app_type] => utility [patent_app_number] => 13/280937 [patent_app_country] => US [patent_app_date] => 2011-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6113 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13280937 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/280937
Memory cell array latchup prevention Oct 24, 2011 Issued
Array ( [id] => 9246887 [patent_doc_number] => 08611177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Semiconductor device including latency counter' [patent_app_type] => utility [patent_app_number] => 13/317598 [patent_app_country] => US [patent_app_date] => 2011-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 10131 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13317598 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/317598
Semiconductor device including latency counter Oct 23, 2011 Issued
Array ( [id] => 8271741 [patent_doc_number] => 08213244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Distributed write data drivers for burst access memories' [patent_app_type] => utility [patent_app_number] => 13/275568 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9355 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/275568
Distributed write data drivers for burst access memories Oct 17, 2011 Issued
Array ( [id] => 7719069 [patent_doc_number] => 20120008404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEMORY DEVICE TESTERS FOR SAME' [patent_app_type] => utility [patent_app_number] => 13/239058 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3540 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20120008404.pdf [firstpage_image] =>[orig_patent_app_number] => 13239058 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/239058
System and method for reducing pin-count of memory devices, and memory device testers for same Sep 20, 2011 Issued
Array ( [id] => 8534733 [patent_doc_number] => 08310892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Capacitive discharge method for writing to non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/237773 [patent_app_country] => US [patent_app_date] => 2011-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 14010 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13237773 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/237773
Capacitive discharge method for writing to non-volatile memory Sep 19, 2011 Issued
Array ( [id] => 8534728 [patent_doc_number] => 08310887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Semiconductor device having single-ended sensing amplifier' [patent_app_type] => utility [patent_app_number] => 13/137854 [patent_app_country] => US [patent_app_date] => 2011-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8124 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13137854 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137854
Semiconductor device having single-ended sensing amplifier Sep 18, 2011 Issued
Array ( [id] => 7770291 [patent_doc_number] => 20120036303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'APPARATUS AND METHODS FOR OPTICALLY-COUPLED MEMORY SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/233580 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4803 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20120036303.pdf [firstpage_image] =>[orig_patent_app_number] => 13233580 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233580
Apparatus and methods for optically-coupled memory systems Sep 14, 2011 Issued
Array ( [id] => 8616526 [patent_doc_number] => 20130021838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'METHOD OF INSPECTING VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/637428 [patent_app_country] => US [patent_app_date] => 2011-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 23972 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13637428 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/637428
Method of inspecting variable resistance nonvolatile memory device and variable resistance nonvolatile memory device Sep 6, 2011 Issued
Array ( [id] => 8521263 [patent_doc_number] => 20120320671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'MEMORY DEVICE WITH REDUCED SENSE TIME READOUT' [patent_app_type] => utility [patent_app_number] => 13/214257 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9054 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214257 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214257
Memory device with reduced sense time readout Aug 21, 2011 Issued
Array ( [id] => 7751387 [patent_doc_number] => 20120025869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'NON-VOLATILE FIELD PROGRAMMABLE GATE ARRAY' [patent_app_type] => utility [patent_app_number] => 13/209704 [patent_app_country] => US [patent_app_date] => 2011-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025869.pdf [firstpage_image] =>[orig_patent_app_number] => 13209704 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/209704
Non-volatile field programmable gate array Aug 14, 2011 Issued
Array ( [id] => 7585568 [patent_doc_number] => 20110280078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'CHARGE PUMP OPERATION IN A NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/186766 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20110280078.pdf [firstpage_image] =>[orig_patent_app_number] => 13186766 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/186766
Charge pump operation in a non-volatile memory device Jul 19, 2011 Issued
Menu