Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9010931 [patent_doc_number] => 08526242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Flash memory and fabrication method and operation method for the same' [patent_app_type] => utility [patent_app_number] => 13/321120 [patent_app_country] => US [patent_app_date] => 2011-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5437 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13321120 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/321120
Flash memory and fabrication method and operation method for the same Mar 6, 2011 Issued
Array ( [id] => 9525731 [patent_doc_number] => 08750015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Integrated circuit comprising a FRAM memory and method for granting read-access to a FRAM memory' [patent_app_type] => utility [patent_app_number] => 13/025878 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3051 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13025878 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025878
Integrated circuit comprising a FRAM memory and method for granting read-access to a FRAM memory Feb 10, 2011 Issued
Array ( [id] => 8084587 [patent_doc_number] => 08149619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Memory structure having volatile and non-volatile memory portions' [patent_app_type] => utility [patent_app_number] => 13/026052 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5639 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/149/08149619.pdf [firstpage_image] =>[orig_patent_app_number] => 13026052 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026052
Memory structure having volatile and non-volatile memory portions Feb 10, 2011 Issued
Array ( [id] => 8579239 [patent_doc_number] => 08345459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Architecture to facilitate reuse in multiple applications' [patent_app_type] => utility [patent_app_number] => 13/024474 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 3517 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13024474 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024474
Architecture to facilitate reuse in multiple applications Feb 9, 2011 Issued
Array ( [id] => 7802298 [patent_doc_number] => 08130574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Error detection on programmable logic resources' [patent_app_type] => utility [patent_app_number] => 13/024666 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11593 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/130/08130574.pdf [firstpage_image] =>[orig_patent_app_number] => 13024666 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024666
Error detection on programmable logic resources Feb 9, 2011 Issued
Array ( [id] => 9075883 [patent_doc_number] => 08553466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Non-volatile memory device, erasing method thereof, and memory system including the same' [patent_app_type] => utility [patent_app_number] => 13/023934 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 18616 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13023934 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023934
Non-volatile memory device, erasing method thereof, and memory system including the same Feb 8, 2011 Issued
Array ( [id] => 6060610 [patent_doc_number] => 20110199808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'MEMORY DEVICE FROM WHICH DUMMY EDGE MEMORY BLOCK IS REMOVED' [patent_app_type] => utility [patent_app_number] => 13/023738 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11252 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20110199808.pdf [firstpage_image] =>[orig_patent_app_number] => 13023738 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023738
Memory device from which dummy edge memory block is removed Feb 8, 2011 Issued
Array ( [id] => 8334371 [patent_doc_number] => 20120201074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'Magnetic Random Access Memory Devices Configured for Self-Referenced Read Operation' [patent_app_type] => utility [patent_app_number] => 13/023442 [patent_app_country] => US [patent_app_date] => 2011-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13023442 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023442
Magnetic random access memory devices configured for self-referenced read operation Feb 7, 2011 Issued
Array ( [id] => 8714724 [patent_doc_number] => 08400869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Semiconductor memory module' [patent_app_type] => utility [patent_app_number] => 13/023068 [patent_app_country] => US [patent_app_date] => 2011-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7145 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13023068 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023068
Semiconductor memory module Feb 7, 2011 Issued
Array ( [id] => 6163456 [patent_doc_number] => 20110194353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'METHOD OF PROGRAMMING MEMORY CELLS FOR A NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/022688 [patent_app_country] => US [patent_app_date] => 2011-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 19412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20110194353.pdf [firstpage_image] =>[orig_patent_app_number] => 13022688 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/022688
Method of programming memory cells for a non-volatile memory device Feb 7, 2011 Issued
Array ( [id] => 8204651 [patent_doc_number] => 08189411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Circuit for controlling an enabling time of an internal control signal according to an operating frequency of a memory device and the method thereof' [patent_app_type] => utility [patent_app_number] => 13/008314 [patent_app_country] => US [patent_app_date] => 2011-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8936 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/189/08189411.pdf [firstpage_image] =>[orig_patent_app_number] => 13008314 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/008314
Circuit for controlling an enabling time of an internal control signal according to an operating frequency of a memory device and the method thereof Jan 17, 2011 Issued
Array ( [id] => 5942510 [patent_doc_number] => 20110103130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'RESISTANCE CHANGE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/987201 [patent_app_country] => US [patent_app_date] => 2011-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3938 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20110103130.pdf [firstpage_image] =>[orig_patent_app_number] => 12987201 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/987201
Resistance change memory device Jan 9, 2011 Issued
Array ( [id] => 5942537 [patent_doc_number] => 20110103157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'TIME REDUCTION OF ADDRESS SETUP/HOLD TIME FOR SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/987466 [patent_app_country] => US [patent_app_date] => 2011-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20110103157.pdf [firstpage_image] =>[orig_patent_app_number] => 12987466 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/987466
Time reduction of address setup/hold time for semiconductor memory Jan 9, 2011 Issued
Array ( [id] => 7536432 [patent_doc_number] => 08050071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Memory core and semiconductor memory device having the same' [patent_app_type] => utility [patent_app_number] => 12/980975 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6941 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/050/08050071.pdf [firstpage_image] =>[orig_patent_app_number] => 12980975 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980975
Memory core and semiconductor memory device having the same Dec 28, 2010 Issued
Array ( [id] => 8666003 [patent_doc_number] => 08379471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Refresh operation control circuit, semiconductor memory device including the same, and refresh operation control method' [patent_app_type] => utility [patent_app_number] => 12/974562 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5515 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12974562 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974562
Refresh operation control circuit, semiconductor memory device including the same, and refresh operation control method Dec 20, 2010 Issued
Array ( [id] => 8250837 [patent_doc_number] => 20120155161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'THREE-TERMINAL OVONIC THRESHOLD SWITCH AS A CURRENT DRIVER IN A PHASE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/974424 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8205 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20120155161.pdf [firstpage_image] =>[orig_patent_app_number] => 12974424 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974424
Three-terminal ovonic threshold switch as a current driver in a phase change memory Dec 20, 2010 Issued
Array ( [id] => 7719054 [patent_doc_number] => 20120008393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/974330 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2965 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20120008393.pdf [firstpage_image] =>[orig_patent_app_number] => 12974330 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974330
NONVOLATILE MEMORY DEVICE AND OPERATION METHOD THEREOF Dec 20, 2010 Abandoned
Array ( [id] => 6186285 [patent_doc_number] => 20110170327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'DEVICES AND METHODS FOR COMPARING DATA IN A CONTENT-ADDRESSABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/974916 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6321 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20110170327.pdf [firstpage_image] =>[orig_patent_app_number] => 12974916 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974916
Devices and methods for comparing data in a content-addressable memory Dec 20, 2010 Issued
Array ( [id] => 8691512 [patent_doc_number] => 08391043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Semiconductor memory apparatus and method of operating the same' [patent_app_type] => utility [patent_app_number] => 12/973000 [patent_app_country] => US [patent_app_date] => 2010-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8895 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12973000 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/973000
Semiconductor memory apparatus and method of operating the same Dec 19, 2010 Issued
Array ( [id] => 8250873 [patent_doc_number] => 20120155187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'Adaptive Programming for Flash Memories' [patent_app_type] => utility [patent_app_number] => 12/973250 [patent_app_country] => US [patent_app_date] => 2010-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4157 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20120155187.pdf [firstpage_image] =>[orig_patent_app_number] => 12973250 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/973250
Adaptive programming for flash memories Dec 19, 2010 Issued
Menu