Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8250821 [patent_doc_number] => 20120155144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'FAST RESPONSE CIRCUITS AND METHODS FOR FRAM POWER LOSS PROTECTION' [patent_app_type] => utility [patent_app_number] => 12/973362 [patent_app_country] => US [patent_app_date] => 2010-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20120155144.pdf [firstpage_image] =>[orig_patent_app_number] => 12973362 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/973362
Fast response circuits and methods for FRAM power loss protection Dec 19, 2010 Issued
Array ( [id] => 6029404 [patent_doc_number] => 20110080778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'PHASE CHANGE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/966346 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 14434 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20110080778.pdf [firstpage_image] =>[orig_patent_app_number] => 12966346 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/966346
Phase change memory device Dec 12, 2010 Issued
Array ( [id] => 8353528 [patent_doc_number] => 08248867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Memory cell employing reduced voltage' [patent_app_type] => utility [patent_app_number] => 12/957936 [patent_app_country] => US [patent_app_date] => 2010-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5002 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12957936 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/957936
Memory cell employing reduced voltage Nov 30, 2010 Issued
Array ( [id] => 8436842 [patent_doc_number] => 08284616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Trench memory structure operation' [patent_app_type] => utility [patent_app_number] => 12/951461 [patent_app_country] => US [patent_app_date] => 2010-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 7796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12951461 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/951461
Trench memory structure operation Nov 21, 2010 Issued
Array ( [id] => 8176509 [patent_doc_number] => 20120110256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'LOW POWER CONTENT-ADDRESSABLE MEMORY AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/914538 [patent_app_country] => US [patent_app_date] => 2010-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8730 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20120110256.pdf [firstpage_image] =>[orig_patent_app_number] => 12914538 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/914538
Low power content-addressable memory and method Oct 27, 2010 Issued
Array ( [id] => 5949602 [patent_doc_number] => 20110032029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'CONFIGURABLE EMBEDDED PROCESSOR' [patent_app_type] => utility [patent_app_number] => 12/912336 [patent_app_country] => US [patent_app_date] => 2010-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6360 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20110032029.pdf [firstpage_image] =>[orig_patent_app_number] => 12912336 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/912336
Configurable embedded processor Oct 25, 2010 Issued
Array ( [id] => 7999343 [patent_doc_number] => 08081519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-20 [patent_title] => 'Adaptive erase and soft programming for memory' [patent_app_type] => utility [patent_app_number] => 12/899403 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 12293 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/081/08081519.pdf [firstpage_image] =>[orig_patent_app_number] => 12899403 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/899403
Adaptive erase and soft programming for memory Oct 5, 2010 Issued
Array ( [id] => 6147832 [patent_doc_number] => 20110019469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/894256 [patent_app_country] => US [patent_app_date] => 2010-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7219 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20110019469.pdf [firstpage_image] =>[orig_patent_app_number] => 12894256 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/894256
Semiconductor memory Sep 29, 2010 Issued
Array ( [id] => 6337737 [patent_doc_number] => 20100329051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS' [patent_app_type] => utility [patent_app_number] => 12/878601 [patent_app_country] => US [patent_app_date] => 2010-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3936 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329051.pdf [firstpage_image] =>[orig_patent_app_number] => 12878601 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/878601
Method and apparatus for synchronization of row and column access operations Sep 8, 2010 Issued
Array ( [id] => 6337462 [patent_doc_number] => 20100329006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE CAPABLE OF MEMORIZING MULTIVALUED DATA' [patent_app_type] => utility [patent_app_number] => 12/876845 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 23902 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329006.pdf [firstpage_image] =>[orig_patent_app_number] => 12876845 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/876845
Semiconductor memory device capable of memorizing multivalued data Sep 6, 2010 Issued
Array ( [id] => 6123467 [patent_doc_number] => 20110085394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'LATENCY CIRCUIT AND SEMICONDUCTOR DEVICE COMPRISING SAME' [patent_app_type] => utility [patent_app_number] => 12/857762 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20110085394.pdf [firstpage_image] =>[orig_patent_app_number] => 12857762 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/857762
Latency circuit and semiconductor device comprising same Aug 16, 2010 Issued
Array ( [id] => 8573193 [patent_doc_number] => 08339846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Flash memory device, programming and reading methods performed in the same' [patent_app_type] => utility [patent_app_number] => 12/856698 [patent_app_country] => US [patent_app_date] => 2010-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9311 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12856698 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/856698
Flash memory device, programming and reading methods performed in the same Aug 15, 2010 Issued
Array ( [id] => 8544912 [patent_doc_number] => 08320209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Sense amplifier using reference signal through standard MOS and DRAM capacitor' [patent_app_type] => utility [patent_app_number] => 12/857172 [patent_app_country] => US [patent_app_date] => 2010-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2516 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857172 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/857172
Sense amplifier using reference signal through standard MOS and DRAM capacitor Aug 15, 2010 Issued
Array ( [id] => 7560091 [patent_doc_number] => 20110273923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'PASS-GATED BUMP SENSE AMPLIFIER FOR EMBEDDED DRAMS' [patent_app_type] => utility [patent_app_number] => 12/857330 [patent_app_country] => US [patent_app_date] => 2010-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6264 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20110273923.pdf [firstpage_image] =>[orig_patent_app_number] => 12857330 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/857330
Pass-gated bump sense amplifier for embedded drams Aug 15, 2010 Issued
Array ( [id] => 4458947 [patent_doc_number] => 07894235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'F-RAM device with current mirror sense amp' [patent_app_type] => utility [patent_app_number] => 12/856279 [patent_app_country] => US [patent_app_date] => 2010-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3354 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/894/07894235.pdf [firstpage_image] =>[orig_patent_app_number] => 12856279 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/856279
F-RAM device with current mirror sense amp Aug 12, 2010 Issued
Array ( [id] => 6384844 [patent_doc_number] => 20100302834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'F-RAM device with current mirror sense amp' [patent_app_type] => utility [patent_app_number] => 12/856305 [patent_app_country] => US [patent_app_date] => 2010-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3354 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20100302834.pdf [firstpage_image] =>[orig_patent_app_number] => 12856305 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/856305
F-RAM device with current mirror sense amp Aug 12, 2010 Issued
Array ( [id] => 7774841 [patent_doc_number] => 20120039104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'METHOD AND APPARATUS FOR BURIED WORD LINE FORMATION' [patent_app_type] => utility [patent_app_number] => 12/855436 [patent_app_country] => US [patent_app_date] => 2010-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2919 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20120039104.pdf [firstpage_image] =>[orig_patent_app_number] => 12855436 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855436
Method and apparatus for buried word line formation Aug 11, 2010 Issued
Array ( [id] => 7774849 [patent_doc_number] => 20120039109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'Memory Cells, Non-Volatile Memory Arrays, Methods Of Operating Memory Cells, Methods Of Reading To And Writing From A Memory Cell, And Methods Of Programming A Memory Cell' [patent_app_type] => utility [patent_app_number] => 12/855624 [patent_app_country] => US [patent_app_date] => 2010-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6409 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20120039109.pdf [firstpage_image] =>[orig_patent_app_number] => 12855624 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855624
Memory cells, non-volatile memory arrays, methods of operating memory cells, methods of writing to and reading from a memory cell, and methods of programming a memory cell Aug 11, 2010 Issued
Array ( [id] => 6023184 [patent_doc_number] => 20110051510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH TRANSFERS A PLURALITY OF VOLTAGES TO MEMORY CELLS AND METHOD OF WRITING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/855134 [patent_app_country] => US [patent_app_date] => 2010-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12075 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20110051510.pdf [firstpage_image] =>[orig_patent_app_number] => 12855134 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855134
Nonvolatile semiconductor memory device which transfers a plurality of voltages to memory cells and method of writing the same Aug 11, 2010 Issued
Array ( [id] => 6259224 [patent_doc_number] => 20100296331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-25 [patent_title] => 'SENSING RESISTANCE VARIABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/847625 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12894 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20100296331.pdf [firstpage_image] =>[orig_patent_app_number] => 12847625 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/847625
Sensing resistance variable memory Jul 29, 2010 Issued
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