Bernarr E. Gregory

Array ( [id] => 6464662 [patent_doc_number] => 20100284224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'FLASH MEMORY DEVICE AND ERASE METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/839261 [patent_app_country] => US [patent_app_date] => 2010-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2591 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20100284224.pdf [firstpage_image] =>[orig_patent_app_number] => 12839261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4601676 [patent_doc_number] => 07978514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Semiconductor memory device for storing multivalued data' [patent_app_type] => utility [patent_app_number] => 12/837595 [patent_app_country] => US [patent_app_date] => 2010-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 92 [patent_no_of_words] => 29322 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/978/07978514.pdf [firstpage_image] =>[orig_patent_app_number] => 12837595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6426424 [patent_doc_number] => 20100278004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'ADDRESS RECEIVING CIRCUIT FOR A SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/834429 [patent_app_country] => US [patent_app_date] => 2010-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2831 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20100278004.pdf [firstpage_image] =>[orig_patent_app_number] => 12834429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6041963 [patent_doc_number] => 20110204040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'Temperature-control circuit of a heating line and a temperature-control method thereof' [patent_app_type] => utility [patent_app_number] => 12/801984 [patent_app_country] => US [patent_app_date] => 2010-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4152 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20110204040.pdf [firstpage_image] =>[orig_patent_app_number] => 12801984 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6549867 [patent_doc_number] => 20100271886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'Semiconductor memory device and latency signal generating method thereof' [patent_app_type] => utility [patent_app_number] => 12/801953 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6974 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20100271886.pdf [firstpage_image] =>[orig_patent_app_number] => 12801953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4459022 [patent_doc_number] => 07894284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Ferroelectric memory bake for screening and repairing bits' [patent_app_type] => utility [patent_app_number] => 12/827533 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4069 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/894/07894284.pdf [firstpage_image] =>[orig_patent_app_number] => 12827533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6133171 [patent_doc_number] => 20110007592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'Semiconductor storage device and refresh control method thereof' [patent_app_type] => utility [patent_app_number] => 12/801854 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18203 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20110007592.pdf [firstpage_image] =>[orig_patent_app_number] => 12801854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6093257 [patent_doc_number] => 20110002181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'Delay locked loop using hybrid fir filtering technique and semiconductor memory device having the same' [patent_app_type] => utility [patent_app_number] => 12/801832 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5717 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20110002181.pdf [firstpage_image] =>[orig_patent_app_number] => 12801832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5966846 [patent_doc_number] => 20110149633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'Memory devices and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 12/801830 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7259 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20110149633.pdf [firstpage_image] =>[orig_patent_app_number] => 12801830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6233438 [patent_doc_number] => 20100265769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/823726 [patent_app_country] => US [patent_app_date] => 2010-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4486 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20100265769.pdf [firstpage_image] =>[orig_patent_app_number] => 12823726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8625376 [patent_doc_number] => 08357871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Welding assembly and method' [patent_app_type] => utility [patent_app_number] => 12/820596 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 5853 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12820596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7546713 [patent_doc_number] => 08054690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Non-volatile memory and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/814761 [patent_app_country] => US [patent_app_date] => 2010-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 38 [patent_no_of_words] => 15341 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/054/08054690.pdf [firstpage_image] =>[orig_patent_app_number] => 12814761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8642984 [patent_doc_number] => 08367972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Systems and methods for diagnosing secondary weld errors' [patent_app_type] => utility [patent_app_number] => 12/813316 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4227 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12813316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8579256 [patent_doc_number] => 08345476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Multi-level cell programming speed improvement through program level exchange' [patent_app_type] => utility [patent_app_number] => 12/797928 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12797928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8631422 [patent_doc_number] => 08363506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/795928 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 7828 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12795928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8631422 [patent_doc_number] => 08363506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/795928 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 7828 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12795928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8631422 [patent_doc_number] => 08363506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/795928 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 7828 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12795928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8631422 [patent_doc_number] => 08363506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/795928 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 7828 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12795928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8626054 [patent_doc_number] => 08358553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Input/output bank architecture for an integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/795602 [patent_app_country] => US [patent_app_date] => 2010-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10168 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12795602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6602439 [patent_doc_number] => 20100309706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'Load reduced memory module and memory system including the same' [patent_app_type] => utility [patent_app_number] => 12/801326 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 15629 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20100309706.pdf [firstpage_image] =>[orig_patent_app_number] => 12801326 [rel_patent_id] =>[rel_patent_doc_number] =>)